mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-27 13:23:44 +09:00
12df71cd74
Switch from using the high priority DMSC transmit message queue used by the secure R5 MCU island boot context to the low priority message queue. While the change in priority is irrelevant for the current boot architecture it however gives us access to a deeper message queue that will allow us to buffer more messages. This is an important aspect when sending several messages without requesting and waiting for a response in a row which is a communication scheme used during core shutdown for example. See AM654 TISCI User Guide for additional details. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
140 lines
3.1 KiB
Plaintext
140 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/dts-v1/;
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#include "k3-am654.dtsi"
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#include "k3-am654-base-board-u-boot.dtsi"
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#include "k3-am654-base-board-ddr4-1600MHz.dtsi"
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#include "k3-am654-ddr.dtsi"
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/ {
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compatible = "ti,am654-evm", "ti,am654";
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model = "Texas Instruments AM654 R5 Base Board";
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aliases {
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serial0 = &wkup_uart0;
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serial2 = &main_uart0;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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tick-timer = &timer1;
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};
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aliases {
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remoteproc0 = &sysctrler;
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remoteproc1 = &a53_0;
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};
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a53_0: a53@0 {
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compatible = "ti,am654-rproc";
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reg = <0x0 0x00a90000 0x0 0x10>;
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power-domains = <&k3_pds 61>,
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<&k3_pds 202>;
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resets = <&k3_reset 202 0>;
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assigned-clocks = <&k3_clks 202 0>;
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assigned-clock-rates = <800000000>;
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ti,sci = <&dmsc>;
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ti,sci-proc-id = <32>;
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ti,sci-host-id = <10>;
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u-boot,dm-spl;
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};
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vtt_supply: vtt_supply {
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compatible = "regulator-gpio";
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regulator-name = "vtt";
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regulator-min-microvolt = <0>;
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regulator-max-microvolt = <3300000>;
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gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
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states = <0 0x0 3300000 0x1>;
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u-boot,dm-spl;
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};
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};
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&cbass_main {
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timer1: timer@40400000 {
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compatible = "ti,omap5430-timer";
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reg = <0x0 0x40400000 0x0 0x80>;
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ti,timer-alwon;
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clock-frequency = <25000000>;
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u-boot,dm-pre-reloc;
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};
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};
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&cbass_mcu {
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mcu_secproxy: secproxy@28380000 {
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compatible = "ti,am654-secure-proxy";
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reg = <0x0 0x2a380000 0x0 0x80000>,
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<0x0 0x2a400000 0x0 0x80000>,
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<0x0 0x2a480000 0x0 0x80000>;
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reg-names = "rt", "scfg", "target_data";
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#mbox-cells = <1>;
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u-boot,dm-spl;
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};
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};
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&cbass_wakeup {
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sysctrler: sysctrler {
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compatible = "ti,am654-system-controller";
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mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
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mbox-names = "tx", "rx";
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u-boot,dm-spl;
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};
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wkup_gpio0: wkup_gpio0@42110000 {
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compatible = "ti,k2g-gpio", "ti,keystone-gpio";
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reg = <0x42110000 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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ti,ngpio = <56>;
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ti,davinci-gpio-unbanked = <0>;
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clocks = <&k3_clks 59 0>;
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clock-names = "gpio";
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u-boot,dm-spl;
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};
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};
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&dmsc {
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mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
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mbox-names = "tx", "rx", "notify";
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ti,host-id = <4>;
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ti,secure-host;
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};
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&wkup_uart0 {
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u-boot,dm-spl;
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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status = "okay";
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};
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&wkup_pmx0 {
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u-boot,dm-spl;
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wkup_uart0_pins_default: wkup_uart0_pins_default {
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pinctrl-single,pins = <
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AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT | MUX_MODE0) /* (AB1) WKUP_UART0_RXD */
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AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT | MUX_MODE0) /* (AB5) WKUP_UART0_TXD */
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AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT | MUX_MODE1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
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AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT | MUX_MODE1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
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>;
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u-boot,dm-spl;
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};
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wkup_vtt_pins_default: wkup_vtt_pins_default {
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pinctrl-single,pins = <
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AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP | MUX_MODE7) /* WKUP_GPIO0_28 */
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>;
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u-boot,dm-spl;
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};
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};
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&memorycontroller {
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vtt-supply = <&vtt_supply>;
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_vtt_pins_default>;
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};
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