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https://github.com/brain-hackers/u-boot-brain
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This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot repository. It currently supports DDR4 on Octeon 3. It can be later extended to support also DDR3 and Octeon 2 platforms. Part 3 includes the DIMM SPD handling code and the Kconfig / Makefile integration. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
24 lines
666 B
Makefile
24 lines
666 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2015 Google, Inc
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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obj-$(CONFIG_RAM) += ram-uclass.o
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obj-$(CONFIG_MPC83XX_SDRAM) += mpc83xx_sdram.o
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obj-$(CONFIG_SANDBOX) += sandbox_ram.o
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obj-$(CONFIG_STM32MP1_DDR) += stm32mp1/
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obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
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obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_K3_AM654_DDRSS) += k3-am654-ddrss.o
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
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obj-$(CONFIG_K3_J721E_DDRSS) += k3-j721e/
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obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o
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obj-$(CONFIG_RAM_SIFIVE) += sifive/
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obj-$(CONFIG_ARCH_OCTEON) += octeon/
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