mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 08:28:51 +09:00
279 lines
5.8 KiB
C
279 lines
5.8 KiB
C
/*
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* U-boot - stamp.c STAMP board specific routines
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*
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* Copyright (c) 2005 blackfin.uclinux.org
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/mem_init.h>
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#include "stamp.h"
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#define STATUS_LED_OFF 0
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#define STATUS_LED_ON 1
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#ifdef CONFIG_SHOW_BOOT_PROGRESS
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# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
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#else
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# define SHOW_BOOT_PROGRESS(arg)
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#endif
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int checkboard(void)
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{
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printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
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printf("Board: ADI BF533 Stamp board\n");
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printf(" Support: http://blackfin.uclinux.org/\n");
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printf(" Richard Klingler <richard@uclinux.net>\n");
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return 0;
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}
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long int initdram(int board_type)
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{
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef DEBUG
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printf("SDRAM attributes:\n");
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printf(" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; "
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"CAS Latency:%d cycles\n", (SDRAM_tRCD >> 15), (SDRAM_tRP >> 11),
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(SDRAM_tRAS >> 6), ( SDRAM_tWR >> 19), (SDRAM_CL >> 2 ));
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printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
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printf("Bank size = %d MB\n", 128);
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#endif
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gd->bd->bi_memstart = CFG_SDRAM_BASE;
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gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
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return (gd->bd->bi_memsize);
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}
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void swap_to(int device_id)
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{
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if (device_id == ETHERNET)
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{
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*pFIO_DIR = PF0;
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asm("ssync;");
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*pFIO_FLAG_S = PF0;
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asm("ssync;");
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}
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else if (device_id == FLASH)
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{
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*pFIO_DIR = (PF4 | PF3 | PF2 | PF1 | PF0);
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*pFIO_FLAG_S = (PF4 | PF3 | PF2 );
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*pFIO_MASKA_D = (PF8 | PF6 | PF5);
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*pFIO_MASKB_D = (PF7);
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*pFIO_POLAR = (PF8 | PF6 | PF5 );
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*pFIO_EDGE = (PF8 | PF7 | PF6 | PF5);
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*pFIO_INEN = (PF8 | PF7 | PF6 | PF5);
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*pFIO_FLAG_D = (PF4 | PF3 | PF2 );
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asm("ssync;");
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}
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else {
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printf("Unknown bank to switch\n");
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}
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return;
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}
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#if defined(CONFIG_MISC_INIT_R)
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/* miscellaneous platform dependent initialisations */
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int misc_init_r(void)
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{
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int i;
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int cf_stat = 0;
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/* Check whether CF card is inserted */
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*pFIO_EDGE = FIO_EDGE_CF_BITS;
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*pFIO_POLAR = FIO_POLAR_CF_BITS;
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for (i=0; i < 0x300 ; i++) asm("nop;");
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if ( (*pFIO_FLAG_S) & CF_STAT_BITS)
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{
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cf_stat = 0;
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}
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else
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{
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cf_stat = 1;
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}
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*pFIO_EDGE = FIO_EDGE_BITS;
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*pFIO_POLAR = FIO_POLAR_BITS;
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if (cf_stat)
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{
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printf ("Booting from COMPACT flash\n");
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/* Set cycle time for CF */
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*(volatile unsigned long *) ambctl1 = CF_AMBCTL1VAL;
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for (i=0; i < 0x1000 ; i++) asm("nop;");
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for (i=0; i < 0x1000 ; i++) asm("nop;");
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for (i=0; i < 0x1000 ; i++) asm("nop;");
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serial_setbrg();
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ide_init();
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setenv ("bootargs", "");
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setenv ("bootcmd", "fatload ide 0:1 0x1000000 uImage-stamp;bootm 0x1000000;bootm 0x20100000" );
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}
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else
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{
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printf ("Booting from FLASH\n");
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}
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return 1;
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}
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#endif
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#ifdef CONFIG_STAMP_CF
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void cf_outb(unsigned char val, volatile unsigned char* addr)
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{
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/*
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* Set PF1 PF0 respectively to 0 1 to divert address
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* to the expansion memory banks
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*/
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*pFIO_FLAG_S = CF_PF0;
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*pFIO_FLAG_C = CF_PF1;
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asm("ssync;");
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*(addr) = val;
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asm("ssync;");
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/* Setback PF1 PF0 to 0 0 to address external
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* memory banks */
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*(volatile unsigned short *) pFIO_FLAG_C = CF_PF1_PF0;
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asm("ssync;");
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}
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unsigned char cf_inb(volatile unsigned char *addr)
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{
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volatile unsigned char c;
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*pFIO_FLAG_S = CF_PF0;
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*pFIO_FLAG_C = CF_PF1;
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asm("ssync;");
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c = *(addr);
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asm("ssync;");
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*pFIO_FLAG_C = CF_PF1_PF0;
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asm("ssync;");
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return c;
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}
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void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words)
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{
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int i;
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*pFIO_FLAG_S = CF_PF0;
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*pFIO_FLAG_C = CF_PF1;
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asm("ssync;");
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for (i = 0;i < words; i++)
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{
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*(sect_buf + i) = *(addr);
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asm("ssync;");
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}
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*pFIO_FLAG_C = CF_PF1_PF0;
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asm("ssync;");
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}
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void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
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{
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int i;
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*pFIO_FLAG_S = CF_PF0;
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*pFIO_FLAG_C = CF_PF1;
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asm("ssync;");
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for (i = 0;i < words; i++)
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{
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*(addr) = *(sect_buf + i);
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asm("ssync;");
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}
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*pFIO_FLAG_C = CF_PF1_PF0;
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asm("ssync;");
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}
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#endif
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void stamp_led_set(int LED1, int LED2, int LED3)
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{
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*pFIO_INEN &= ~( PF2 | PF3 | PF4);
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*pFIO_DIR |= ( PF2 | PF3 | PF4);
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if(LED1 == STATUS_LED_OFF)
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*pFIO_FLAG_S = PF2;
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else
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*pFIO_FLAG_C = PF2;
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if(LED2 == STATUS_LED_OFF)
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*pFIO_FLAG_S = PF3;
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else
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*pFIO_FLAG_C = PF3;
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if(LED3 == STATUS_LED_OFF)
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*pFIO_FLAG_S = PF4;
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else
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*pFIO_FLAG_C = PF4;
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asm("ssync;");
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}
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void show_boot_progress(int status)
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{
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switch(status){
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case 1:
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stamp_led_set(STATUS_LED_OFF,STATUS_LED_OFF,STATUS_LED_ON);
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break;
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case 2:
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stamp_led_set(STATUS_LED_OFF,STATUS_LED_ON,STATUS_LED_OFF);
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break;
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case 3:
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stamp_led_set(STATUS_LED_OFF,STATUS_LED_ON,STATUS_LED_ON);
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break;
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case 4:
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stamp_led_set(STATUS_LED_ON,STATUS_LED_OFF,STATUS_LED_OFF);
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break;
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case 5:
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case 6:
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stamp_led_set(STATUS_LED_ON,STATUS_LED_OFF,STATUS_LED_ON);
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break;
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case 7:
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case 8:
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stamp_led_set(STATUS_LED_ON,STATUS_LED_ON,STATUS_LED_OFF);
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break;
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case 9:
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case 10:
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case 11:
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case 12:
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case 13:
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case 14:
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case 15:
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stamp_led_set(STATUS_LED_OFF,STATUS_LED_OFF,STATUS_LED_OFF);
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break;
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default:
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stamp_led_set(STATUS_LED_ON,STATUS_LED_ON,STATUS_LED_ON);
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break;
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}
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}
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