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https://github.com/brain-hackers/u-boot-brain
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a46b1852de
DDR errata-A008378 applies to LS1021-20-22A-R1.0, T1023-R1.0, T1024-R1.0, T1040-42-20-22-R1.0/R1.1, it has been fixed on LS102x Rev2. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
93 lines
2.0 KiB
C
93 lines
2.0 KiB
C
/*
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* Copyright 2013 - 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _FSL_ERRATA_H
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#define _FSL_ERRATA_H
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#include <common.h>
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#if defined(CONFIG_PPC)
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#include <asm/processor.h>
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#elif defined(CONFIG_LS102XA)
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#include <asm/arch-ls102xa/immap_ls102xa.h>
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#elif defined(CONFIG_FSL_LAYERSCAPE)
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#include <asm/arch/soc.h>
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#endif
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#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
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static inline bool has_erratum_a006379(void)
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{
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u32 svr = get_svr();
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if (((SVR_SOC_VER(svr) == SVR_T4240) && SVR_MAJ(svr) <= 1) ||
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((SVR_SOC_VER(svr) == SVR_T4160) && SVR_MAJ(svr) <= 1) ||
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((SVR_SOC_VER(svr) == SVR_T4080) && SVR_MAJ(svr) <= 1) ||
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((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2) ||
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((SVR_SOC_VER(svr) == SVR_B4420) && SVR_MAJ(svr) <= 2) ||
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((SVR_SOC_VER(svr) == SVR_T2080) && SVR_MAJ(svr) <= 1) ||
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((SVR_SOC_VER(svr) == SVR_T2081) && SVR_MAJ(svr) <= 1))
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return true;
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return false;
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}
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#endif
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#ifdef CONFIG_SYS_FSL_ERRATUM_A007186
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static inline bool has_erratum_a007186(void)
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{
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u32 svr = get_svr();
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u32 soc = SVR_SOC_VER(svr);
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switch (soc) {
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case SVR_T4240:
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return IS_SVR_REV(svr, 2, 0);
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case SVR_T4160:
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return IS_SVR_REV(svr, 2, 0);
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case SVR_B4860:
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return IS_SVR_REV(svr, 2, 0);
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case SVR_B4420:
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return IS_SVR_REV(svr, 2, 0);
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case SVR_T2081:
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case SVR_T2080:
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return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
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}
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return false;
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}
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#endif
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#ifdef CONFIG_SYS_FSL_ERRATUM_A008378
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static inline bool has_erratum_a008378(void)
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{
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u32 svr = get_svr();
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u32 soc = SVR_SOC_VER(svr);
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switch (soc) {
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#ifdef CONFIG_LS102XA
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case SOC_VER_LS1020:
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case SOC_VER_LS1021:
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case SOC_VER_LS1022:
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case SOC_VER_SLS1020:
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return IS_SVR_REV(svr, 1, 0);
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#endif
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#ifdef CONFIG_PPC
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case SVR_T1023:
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case SVR_T1024:
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return IS_SVR_REV(svr, 1, 0);
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case SVR_T1020:
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case SVR_T1022:
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case SVR_T1040:
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case SVR_T1042:
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return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
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#endif
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default:
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return false;
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}
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}
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#endif
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#endif /* _FSL_ERRATA_H */
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