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https://github.com/brain-hackers/u-boot-brain
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124913556c
The endless waiting for a bit to be set can cause a hang, add a timeout so we prevent such situation. A testcase for such a hang is below. The testcase assumes a device to be present at address 0x50 and a device to NOT be present at address 0x42 . Also note that the "sleep 1" induced delays are imperative for this bug to manifest . i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x42 0x0.2 0x10 0x42000000 The expected result of the above command is: Error reading the chip. Error reading the chip. While without this patch, we observe a hang in the last read from 0x42 precisely when waiting for this bit to be set. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
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| .. | ||
| bfin-twi_i2c.c | ||
| davinci_i2c.c | ||
| designware_i2c.c | ||
| designware_i2c.h | ||
| fsl_i2c.c | ||
| fti2c010.c | ||
| fti2c010.h | ||
| i2c_core.c | ||
| Makefile | ||
| mv_i2c.c | ||
| mv_i2c.h | ||
| mvtwsi.c | ||
| mxc_i2c.c | ||
| mxs_i2c.c | ||
| omap24xx_i2c.c | ||
| omap24xx_i2c.h | ||
| omap1510_i2c.c | ||
| pca9564_i2c.c | ||
| ppc4xx_i2c.c | ||
| rcar_i2c.c | ||
| s3c24x0_i2c.c | ||
| s3c24x0_i2c.h | ||
| sh_i2c.c | ||
| sh_sh7734_i2c.c | ||
| soft_i2c.c | ||
| tegra_i2c.c | ||
| tsi108_i2c.c | ||
| u8500_i2c.c | ||
| u8500_i2c.h | ||
| zynq_i2c.c | ||