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https://github.com/brain-hackers/u-boot-brain
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d0df9588e8
The option is never enabled by anyone. Remove the code surrounded by its ifdef. This should be handled by the clock/reset drivers. CONFIG_UNIPHIER_ETH in scripts/config_whitelist.txt will be dropped by the next resync. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
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* Copyright (C) 2011-2015 Panasonic Corporation
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc-regs.h"
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void uniphier_pro4_clk_init(void)
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{
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u32 tmp;
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/* deassert reset */
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tmp = readl(SC_RSTCTRL);
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#ifdef CONFIG_USB_DWC3_UNIPHIER
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tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
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SC_RSTCTRL_NRST_GIO;
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#endif
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#ifdef CONFIG_NAND_DENALI
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tmp |= SC_RSTCTRL_NRST_NAND;
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#endif
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writel(tmp, SC_RSTCTRL);
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readl(SC_RSTCTRL); /* dummy read */
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#ifdef CONFIG_USB_DWC3_UNIPHIER
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tmp = readl(SC_RSTCTRL2);
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tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
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writel(tmp, SC_RSTCTRL2);
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readl(SC_RSTCTRL2); /* dummy read */
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#endif
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/* provide clocks */
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tmp = readl(SC_CLKCTRL);
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#ifdef CONFIG_USB_DWC3_UNIPHIER
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tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
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SC_CLKCTRL_CEN_GIO;
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#endif
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#ifdef CONFIG_USB_EHCI_HCD
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tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
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#endif
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#ifdef CONFIG_NAND_DENALI
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tmp |= SC_CLKCTRL_CEN_NAND;
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#endif
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writel(tmp, SC_CLKCTRL);
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readl(SC_CLKCTRL); /* dummy read */
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}
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