u-boot-brain/cpu/mpc8xxx/ddr
Kumar Gala e7563aff17 fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.

Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.

This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have.  Its only the LAW
setup that limits what is visible to the system.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 09:15:50 -05:00
..
common_timing_params.h FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
ctrl_regs.c fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00
ddr.h fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00
ddr1_dimm_params.c fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00
ddr2_dimm_params.c fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00
ddr3_dimm_params.c fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00
lc_common_dimm_params.c fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
main.c fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00
Makefile fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
options.c fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
util.c fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT 2009-06-12 09:15:50 -05:00