u-boot-brain/board/freescale/mpc8641hpcn
Selvamuthukumar 9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
..
config.mk mpc8641: Change 32-bit memory map 2008-11-10 10:10:04 -06:00
ddr.c Coding Style cleanup, update CHANGELOG 2008-11-02 16:14:22 +01:00
law.c mpc8641: Support 36-bit physical addressing 2008-11-10 10:10:05 -06:00
Makefile FSL DDR: Convert MPC8641HPCN to new DDR code. 2008-08-27 02:06:02 +02:00
mpc8641hpcn.c mpc8641: fix address-cells default in old .dts detection 2008-11-11 09:44:10 -06:00
u-boot.lds Align end of bss by 4 bytes 2008-11-18 23:13:16 +01:00