mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
62 lines
1.3 KiB
C
62 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2013
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* Bo Shen <voice.shen@atmel.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pit.h>
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#include <asm/arch/clk.h>
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#include <div64.h>
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#if !defined(CONFIG_AT91FAMILY)
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# error You need to define CONFIG_AT91FAMILY in your board config!
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* We're using the SAMA5D3x PITC in 32 bit mode, by
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* setting the 20 bit counter period to its maximum (0xfffff).
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* (See the relevant data sheets to understand that this really works)
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*
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* We do also mimic the typical powerpc way of incrementing
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* two 32 bit registers called tbl and tbu.
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*
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* Those registers increment at 1/16 the main clock rate.
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*/
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#define TIMER_LOAD_VAL 0xfffff
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/*
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* Use the PITC in full 32 bit incrementing mode
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*/
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int timer_init(void)
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{
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at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
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/* Enable PITC Clock */
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at91_periph_clk_enable(ATMEL_ID_PIT);
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/* Enable PITC */
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writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
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gd->arch.timer_rate_hz = get_pit_clk_rate() / 16;
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return 0;
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}
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/*
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* Return the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return gd->arch.timer_rate_hz;
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}
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