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https://github.com/brain-hackers/u-boot-brain
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![Kyle Moffett](/assets/img/avatar_default.png)
The eXMeritus HWW-1U-1A unit is a DO-160-certified 13lb 1U chassis with 3 independent TEMPEST zones. Two independent P2020 computers may be found inside each zone. Complete hardware support is included. High-level hardware overview: * DO-160 certified for passenger aircraft (noncritical) * TEMPEST ceritified for RED/BLACK separation * 3 zones per chassis, 2 computers per zone (total of 6) * Dual-core 1.066GHz P2020 per computer * One 2GB DDR2 SO-RDIMM module per computer (upgradable to 4GB) * Removable 80GB or 160GB Intel X18-M SSD per computer * Front-accessible dual-port E1000E per computer * Front-accessible serial console per computer * Front-accessible USB port per computer * Internal Gigabit crossover within each TEMPEST zone * Internal unidirectional fiber links across TEMPEST zones * Battery-backed DS1339 I2C RTC on each CPU. Combined, each 13lb 1U chassis contains 12GB RAM, 12 cores @ 1.066GHz, 12 front-accessible Gigabit Ethernet ports and 960GB of solid-state storage with a total power consumption of ~200W. Additional notes: * SPD detection is only known to work with the DO-160-certified DIMMs * CPU reset is a little quirky due to hardware misfeature. Proper support for the hardware reset mechanism has been left for a later patch series to address. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
278 lines
6.9 KiB
C
278 lines
6.9 KiB
C
/*
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* Copyright 2009-2011 eXMeritus, A Boeing Company
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* Copyright 2007-2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_pci.h>
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#include <asm/fsl_ddr_sdram.h>
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#include <asm/io.h>
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#include <miiphy.h>
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#include <libfdt.h>
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#include <linux/ctype.h>
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#include <fdt_support.h>
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#include <fsl_mdio.h>
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#include <tsec.h>
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#include <asm/fsl_law.h>
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#include <netdev.h>
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#include <malloc.h>
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#include <i2c.h>
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#include <pca953x.h>
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#include "gpios.h"
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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unsigned int gpio_high = 0;
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unsigned int gpio_low = 0;
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unsigned int gpio_in = 0;
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unsigned int i;
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puts("Board: HWW-1U-1A ");
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/*
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* First just figure out which CPU we're on, then use that to
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* configure the lists of other GPIOs to be programmed.
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*/
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mpc85xx_gpio_set_in(GPIO_CPU_ID);
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if (hww1u1a_is_cpu_a()) {
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puts("CPU A\n");
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/* We want to turn on some LEDs */
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gpio_high |= GPIO_CPUA_CPU_READY;
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gpio_low |= GPIO_CPUA_DEBUG_LED1;
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gpio_low |= GPIO_CPUA_DEBUG_LED2;
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/* Disable the unused transmitters */
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gpio_low |= GPIO_CPUA_TDIS1A;
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gpio_high |= GPIO_CPUA_TDIS1B;
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gpio_low |= GPIO_CPUA_TDIS2A;
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gpio_high |= GPIO_CPUA_TDIS2B;
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} else {
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puts("CPU B\n");
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/* We want to turn on some LEDs */
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gpio_high |= GPIO_CPUB_CPU_READY;
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gpio_low |= GPIO_CPUB_DEBUG_LED1;
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gpio_low |= GPIO_CPUB_DEBUG_LED2;
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/* Enable the appropriate receivers */
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gpio_high |= GPIO_CPUB_RMUX_SEL0A;
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gpio_high |= GPIO_CPUB_RMUX_SEL0B;
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gpio_low |= GPIO_CPUB_RMUX_SEL1A;
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gpio_low |= GPIO_CPUB_RMUX_SEL1B;
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}
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/* These GPIOs are common */
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gpio_in |= IRQ_I2CINT | IRQ_FANINT | IRQ_DIMM_EVENT;
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gpio_low |= GPIO_RS422_RE;
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gpio_high |= GPIO_RS422_DE;
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/* Ok, now go ahead and program all of those in one go */
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mpc85xx_gpio_set(gpio_high|gpio_low|gpio_in,
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gpio_high|gpio_low,
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gpio_high);
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/*
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* If things have been taken out of reset early (for example, by one
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* of the BDI3000 debuggers), then we need to put them back in reset
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* and delay a while before we continue.
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*/
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if (mpc85xx_gpio_get(GPIO_RESETS)) {
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ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR;
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puts("Debugger detected... extra device reset enabled!\n");
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/* Put stuff into reset and disable the DDR controller */
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mpc85xx_gpio_set_low(GPIO_RESETS);
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out_be32(&ddr->sdram_cfg, 0x00000000);
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puts(" Waiting 1 sec for reset...");
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for (i = 0; i < 10; i++) {
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udelay(100000);
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puts(".");
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}
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puts("\n");
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}
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/* Now bring everything back out of reset again */
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mpc85xx_gpio_set_high(GPIO_RESETS);
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return 0;
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}
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/*
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* This little shell function just returns whether or not it's CPU A.
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* It can be used to select the right device-tree when booting, etc.
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*/
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int do_hww1u1a_test_cpu_a(cmd_tbl_t *cmdtp, int flag,
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int argc, char * const argv[])
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{
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if (argc > 1)
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cmd_usage(cmdtp);
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if (hww1u1a_is_cpu_a())
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return 0;
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else
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return 1;
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}
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U_BOOT_CMD(
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test_cpu_a, 1, 0, do_hww1u1a_test_cpu_a,
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"Test if this is CPU A (versus B) on the eXMeritus HWW-1U-1A board",
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""
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);
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/* Create a prompt-like string: "uboot@HOSTNAME% " */
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#define PROMPT_PREFIX "uboot@exm"
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#define PROMPT_SUFFIX "% "
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/* This function returns a PS1 prompt based on the serial number */
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static char *hww1u1a_prompt;
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const char *hww1u1a_get_ps1(void)
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{
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unsigned long len, i, j;
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const char *serialnr;
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/* If our prompt was already set, just use that */
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if (hww1u1a_prompt)
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return hww1u1a_prompt;
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/* Use our serial number if present, otherwise a default */
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serialnr = getenv("serial#");
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if (!serialnr || !serialnr[0])
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serialnr = "999999-X";
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/*
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* We will turn the serial number into a hostname by:
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* (A) Delete all non-alphanumerics.
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* (B) Lowercase all letters.
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* (C) Prefix "exm".
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* (D) Suffix "a" for CPU A and "b" for CPU B.
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*/
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for (i = 0, len = 0; serialnr[i]; i++) {
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if (isalnum(serialnr[i]))
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len++;
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}
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len += sizeof(PROMPT_PREFIX PROMPT_SUFFIX) + 1; /* Includes NUL */
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hww1u1a_prompt = malloc(len);
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if (!hww1u1a_prompt)
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return PROMPT_PREFIX "UNKNOWN(ENOMEM)" PROMPT_SUFFIX;
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/* Now actually fill it in */
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i = 0;
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/* Handle the prefix */
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for (j = 0; j < sizeof(PROMPT_PREFIX) - 1; j++)
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hww1u1a_prompt[i++] = PROMPT_PREFIX[j];
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/* Now the serial# part of the hostname */
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for (j = 0; serialnr[j]; j++)
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if (isalnum(serialnr[j]))
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hww1u1a_prompt[i++] = tolower(serialnr[j]);
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/* Now the CPU id ("a" or "b") */
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hww1u1a_prompt[i++] = hww1u1a_is_cpu_a() ? 'a' : 'b';
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/* Finally the suffix */
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for (j = 0; j < sizeof(PROMPT_SUFFIX); j++)
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hww1u1a_prompt[i++] = PROMPT_SUFFIX[j];
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/* This should all have added up, but just in case */
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hww1u1a_prompt[len - 1] = '\0';
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/* Now we're done */
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return hww1u1a_prompt;
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}
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void pci_init_board(void)
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{
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fsl_pcie_init_board(0);
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}
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int board_early_init_r(void)
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{
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const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
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const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
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/*
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* Remap bootflash region to caching-inhibited
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* so that flash can be erased properly.
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*/
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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/* invalidate existing TLB entry for FLASH */
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disable_tlb(flash_esel);
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set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
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0, flash_esel, BOOKE_PAGESZ_256M, 1);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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struct tsec_info_struct tsec_info[4];
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struct fsl_pq_mdio_info mdio_info;
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SET_STD_TSEC_INFO(tsec_info[0], 1);
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SET_STD_TSEC_INFO(tsec_info[1], 2);
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SET_STD_TSEC_INFO(tsec_info[2], 3);
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if (hww1u1a_is_cpu_a())
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tsec_info[2].phyaddr = TSEC3_PHY_ADDR_CPUA;
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else
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tsec_info[2].phyaddr = TSEC3_PHY_ADDR_CPUB;
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mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
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mdio_info.name = DEFAULT_MII_NAME;
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fsl_pq_mdio_init(bis, &mdio_info);
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tsec_eth_init(bis, tsec_info, 3);
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return pci_eth_init(bis);
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}
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void ft_board_setup(void *blob, bd_t *bd)
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{
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phys_addr_t base;
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phys_size_t size;
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ft_cpu_setup(blob, bd);
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base = getenv_bootm_low();
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size = getenv_bootm_size();
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fdt_fixup_memory(blob, (u64)base, (u64)size);
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FT_FSL_PCI_SETUP;
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}
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