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https://github.com/brain-hackers/u-boot-brain
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604c7d4a5a
Sometimes, for example if the display is mounted in portrait mode or even if it is mounted landscape but rotated by 180 degrees, we need to rotate our content of the display respectively the framebuffer, so that user can read the messages which are printed out. For this we introduce the feature called "CONFIG_LCD_ROTATION", this may be defined in the board-configuration if needed. After this the lcd_console will be initialized with a given rotation from "vl_rot" out of "vidinfo_t" which is provided by the board specific code. If CONFIG_LCD_ROTATION is not defined, the console will be initialized with 0 degrees rotation. Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> [agust: fixed 'struct vidinfo' has no member named 'vl_rot' errors] Signed-off-by: Anatolij Gustschin <agust@denx.de>
83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
/*
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* exynos_lcd.h - Exynos LCD Controller structures
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*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _EXYNOS_LCD_H_
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#define _EXYNOS_LCD_H_
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enum {
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FIMD_RGB_INTERFACE = 1,
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FIMD_CPU_INTERFACE = 2,
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};
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enum exynos_fb_rgb_mode_t {
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MODE_RGB_P = 0,
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MODE_BGR_P = 1,
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MODE_RGB_S = 2,
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MODE_BGR_S = 3,
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};
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typedef struct vidinfo {
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ushort vl_col; /* Number of columns (i.e. 640) */
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ushort vl_row; /* Number of rows (i.e. 480) */
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ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */
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ushort vl_width; /* Width of display area in millimeters */
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ushort vl_height; /* Height of display area in millimeters */
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/* LCD configuration register */
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u_char vl_freq; /* Frequency */
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u_char vl_clkp; /* Clock polarity */
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u_char vl_oep; /* Output Enable polarity */
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u_char vl_hsp; /* Horizontal Sync polarity */
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u_char vl_vsp; /* Vertical Sync polarity */
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u_char vl_dp; /* Data polarity */
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u_char vl_bpix; /* Bits per pixel */
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/* Horizontal control register. Timing from data sheet */
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u_char vl_hspw; /* Horz sync pulse width */
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u_char vl_hfpd; /* Wait before of line */
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u_char vl_hbpd; /* Wait end of line */
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/* Vertical control register. */
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u_char vl_vspw; /* Vertical sync pulse width */
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u_char vl_vfpd; /* Wait before of frame */
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u_char vl_vbpd; /* Wait end of frame */
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u_char vl_cmd_allow_len; /* Wait end of frame */
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unsigned int win_id;
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unsigned int init_delay;
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unsigned int power_on_delay;
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unsigned int reset_delay;
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unsigned int interface_mode;
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unsigned int mipi_enabled;
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unsigned int dp_enabled;
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unsigned int cs_setup;
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unsigned int wr_setup;
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unsigned int wr_act;
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unsigned int wr_hold;
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unsigned int logo_on;
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unsigned int logo_width;
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unsigned int logo_height;
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int logo_x_offset;
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int logo_y_offset;
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unsigned long logo_addr;
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unsigned int rgb_mode;
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unsigned int resolution;
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/* parent clock name(MPLL, EPLL or VPLL) */
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unsigned int pclk_name;
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/* ratio value for source clock from parent clock. */
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unsigned int sclk_div;
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unsigned int dual_lcd_enabled;
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} vidinfo_t;
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void init_panel_info(vidinfo_t *vid);
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#endif
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