mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
8a6ffeda97
This partially reverts changes by commit 2cc393f32f
("video: make BPP and ANSI configs optional") since it
caused issues with other boards (missing LCD console
output on pinebook, x86 platform or sandbox). Enable
all disabled options again and opt out of not supported
color depth in board defconfigs.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Vagrant Cascadian <vagrant@debian.org>
101 lines
2.6 KiB
Plaintext
101 lines
2.6 KiB
Plaintext
CONFIG_ARM=y
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# CONFIG_SPL_USE_ARCH_MEMCPY is not set
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00100000
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CONFIG_ROCKCHIP_RK3288=y
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# CONFIG_SPL_MMC_SUPPORT is not set
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CONFIG_TARGET_CHROMEBIT_MICKEY=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_DEBUG_UART_BASE=0xff690000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_DEBUG_UART=y
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CONFIG_SPL_TEXT_BASE=0xff704000
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CONFIG_USE_PREBOOT=y
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CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
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# CONFIG_SPL_CRC32_SUPPORT is not set
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CONFIG_SPL_PAYLOAD="u-boot.img"
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF_TEST=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_PARTITION_UUIDS=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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# CONFIG_SPL_SIMPLE_BUS is not set
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# CONFIG_SPL_BLK is not set
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_I2C_CROS_EC_TUNNEL=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_I2C_MUX=y
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CONFIG_DM_KEYBOARD=y
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CONFIG_CROS_EC_KEYB=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_SPI=y
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CONFIG_PWRSEQ=y
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# CONFIG_SPL_DM_MMC is not set
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MTD=y
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CONFIG_SF_DEFAULT_BUS=2
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_PINCTRL=y
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CONFIG_PINCONF=y
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CONFIG_SPL_PINCTRL=y
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# CONFIG_SPL_PINMUX is not set
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CONFIG_SPL_PINCONF=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_PMIC_RK8XX=y
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CONFIG_SPL_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_ROCKCHIP_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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# CONFIG_SPL_DM_USB is not set
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CONFIG_USB_DWC2=y
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CONFIG_ROCKCHIP_USB2_PHY=y
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CONFIG_DM_VIDEO=y
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# CONFIG_VIDEO_BPP8 is not set
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CONFIG_DISPLAY=y
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CONFIG_VIDEO_ROCKCHIP=y
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CONFIG_DISPLAY_ROCKCHIP_HDMI=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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