mirror of
https://github.com/brain-hackers/u-boot-brain
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a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
73 lines
2.4 KiB
C
73 lines
2.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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#ifndef __VCOREIII_H
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#define __VCOREIII_H
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#include <linux/sizes.h>
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/* Onboard devices */
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#define CONFIG_SYS_MALLOC_LEN 0x1F0000
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#define CONFIG_SYS_LOAD_ADDR 0x00100000
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
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#define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */
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#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
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#else
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#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
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#endif
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ
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#define CONFIG_BOARD_TYPES
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
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#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
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#elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
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#define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M)
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#elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
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#define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M)
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#else
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#error Unknown DDR size - please add!
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#endif
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_BOARD_EARLY_INIT_R
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#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
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#define VCOREIII_DEFAULT_MTD_ENV \
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"mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
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"mtdids="CONFIG_MTDIDS_DEFAULT"\0"
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#else
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#define VCOREIII_DEFAULT_MTD_ENV /* Go away */
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#endif
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#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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VCOREIII_DEFAULT_MTD_ENV \
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"loadaddr=0x81000000\0" \
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"spi_image_off=0x00100000\0" \
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"console=ttyS0,115200\0" \
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"setup=setenv bootargs console=${console} ${mtdparts}" \
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"${bootargs_extra}\0" \
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"spiboot=run setup; sf probe; sf read ${loadaddr}" \
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"${spi_image_off} 0x600000; bootm ${loadaddr}\0" \
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"ubootfile=u-boot.bin\0" \
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"update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \
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"sf erase UBoot 0x100000;" \
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"sf write ${loadaddr} UBoot ${filesize}\0" \
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"bootcmd=run spiboot\0" \
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""
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#endif /* __VCOREIII_H */
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