mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-06 21:03:21 +09:00
![Masahiro Yamada](/assets/img/avatar_default.png)
The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters periodically. This compensates for the voltage and temperature deviation and improves the PHY parameter adjustment. Instead, it requires 64 byte scratch memory in each DRAM channel for the dynamic training. The memory regions must be reserved in DT before jumping to the kernel. The scratch area can be anywhere in each DRAM channel, but the DRAM init code in SPL currently assigns it at the end of each channel. So, it makes sense to reserve the regions on run-time by U-Boot instead of statically embedding it in the DT in Linux. Anyway, a boot-loader should know much more about memory initialization than the kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
105 lines
2.5 KiB
Plaintext
105 lines
2.5 KiB
Plaintext
if ARCH_UNIPHIER
|
|
|
|
config SYS_CONFIG_NAME
|
|
default "uniphier"
|
|
|
|
config ARCH_UNIPHIER_32BIT
|
|
bool
|
|
select CPU_V7
|
|
|
|
config ARCH_UNIPHIER_64BIT
|
|
bool
|
|
select ARM64
|
|
select SPL_SEPARATE_BSS
|
|
select ARMV8_MULTIENTRY
|
|
|
|
choice
|
|
prompt "UniPhier SoC select"
|
|
default ARCH_UNIPHIER_PRO4
|
|
|
|
config ARCH_UNIPHIER_SLD3
|
|
bool "UniPhier PH1-sLD3 SoC"
|
|
select ARCH_UNIPHIER_32BIT
|
|
|
|
config ARCH_UNIPHIER_LD4_SLD8
|
|
bool "UniPhier PH1-LD4/PH1-sLD8 SoC"
|
|
select ARCH_UNIPHIER_32BIT
|
|
|
|
config ARCH_UNIPHIER_PRO4
|
|
bool "UniPhier PH1-Pro4 SoC"
|
|
select ARCH_UNIPHIER_32BIT
|
|
|
|
config ARCH_UNIPHIER_PRO5_PXS2_LD6B
|
|
bool "UniPhier PH1-Pro5/ProXstream2/PH1-LD6b SoC"
|
|
select ARCH_UNIPHIER_32BIT
|
|
|
|
config ARCH_UNIPHIER_LD11
|
|
bool "UniPhier PH1-LD11 SoC"
|
|
select ARCH_UNIPHIER_64BIT
|
|
|
|
config ARCH_UNIPHIER_LD20
|
|
bool "UniPhier PH1-LD20 SoC"
|
|
select ARCH_UNIPHIER_64BIT
|
|
select OF_BOARD_SETUP
|
|
|
|
endchoice
|
|
|
|
config ARCH_UNIPHIER_LD4
|
|
bool "Enable UniPhier PH1-LD4 SoC support"
|
|
depends on ARCH_UNIPHIER_LD4_SLD8
|
|
default y
|
|
|
|
config ARCH_UNIPHIER_SLD8
|
|
bool "Enable UniPhier PH1-sLD8 SoC support"
|
|
depends on ARCH_UNIPHIER_LD4_SLD8
|
|
default y
|
|
|
|
config ARCH_UNIPHIER_PRO5
|
|
bool "Enable UniPhier PH1-Pro5 SoC support"
|
|
depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
|
|
default y
|
|
|
|
config ARCH_UNIPHIER_PXS2
|
|
bool "Enable UniPhier ProXstream2 SoC support"
|
|
depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
|
|
default y
|
|
|
|
config ARCH_UNIPHIER_LD6B
|
|
bool "Enable UniPhier PH1-LD6b SoC support"
|
|
depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
|
|
default y
|
|
|
|
config MICRO_SUPPORT_CARD
|
|
bool "Use Micro Support Card"
|
|
help
|
|
This option provides support for the expansion board, available
|
|
on some UniPhier reference boards.
|
|
|
|
Say Y to use the on-board UART, Ether, LED devices.
|
|
|
|
config CMD_PINMON
|
|
bool "Enable boot mode pins monitor command"
|
|
default y
|
|
help
|
|
The command "pinmon" shows the state of the boot mode pins.
|
|
The boot mode pins are latched when the system reset is deasserted
|
|
and determine which device the system should load a boot image from.
|
|
|
|
config CMD_DDRPHY_DUMP
|
|
bool "Enable dump command of DDR PHY parameters"
|
|
depends on ARCH_UNIPHIER_LD4 || ARCH_UNIPHIER_PRO4 || ARCH_UNIPHIER_SLD8
|
|
default y
|
|
help
|
|
The command "ddrphy" shows the resulting parameters of DDR PHY
|
|
training; it is useful for the evaluation of DDR PHY training.
|
|
|
|
config CMD_DDRMPHY_DUMP
|
|
bool "Enable dump command of DDR Multi PHY parameters"
|
|
depends on ARCH_UNIPHIER_PXS2 || ARCH_UNIPHIER_LD6B
|
|
default y
|
|
help
|
|
The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
|
|
training; it is useful for the evaluation of DDR Multi PHY training.
|
|
|
|
endif
|