mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-10 04:03:46 +09:00
06985289d4
This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Maxim Sloyko <maxims@google.com> Cc: Erik van Luijk <evanluijk@interact.nl> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Glass <sjg@chromium.org> Cc: "Álvaro Fernández Rojas" <noltari@gmail.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
113 lines
2.0 KiB
C
113 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
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* (C) Copyright 2013 - 2018 Xilinx, Inc.
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*/
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#include <common.h>
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#include <dm/uclass.h>
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#include <fdtdec.h>
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#include <fpga.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <watchdog.h>
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#include <wdt.h>
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#include <zynqpl.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
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int board_early_init_f(void)
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{
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return 0;
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}
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#endif
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int board_init(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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int env_targets_len = 0;
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const char *mode;
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char *new_targets;
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char *env_targets;
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switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
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case ZYNQ_BM_QSPI:
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mode = "qspi";
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env_set("modeboot", "qspiboot");
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break;
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case ZYNQ_BM_NAND:
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mode = "nand";
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env_set("modeboot", "nandboot");
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break;
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case ZYNQ_BM_NOR:
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mode = "nor";
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env_set("modeboot", "norboot");
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break;
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case ZYNQ_BM_SD:
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mode = "mmc";
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env_set("modeboot", "sdboot");
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break;
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case ZYNQ_BM_JTAG:
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mode = "pxe dhcp";
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env_set("modeboot", "jtagboot");
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break;
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default:
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mode = "";
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env_set("modeboot", "");
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break;
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}
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/*
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* One terminating char + one byte for space between mode
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* and default boot_targets
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*/
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env_targets = env_get("boot_targets");
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if (env_targets)
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env_targets_len = strlen(env_targets);
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new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
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if (!new_targets)
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return -ENOMEM;
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sprintf(new_targets, "%s %s", mode,
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env_targets ? env_targets : "");
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env_set("boot_targets", new_targets);
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return 0;
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}
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#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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int dram_init(void)
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{
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if (fdtdec_setup_mem_size_base() != 0)
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return -EINVAL;
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zynq_ddrc_init();
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return 0;
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}
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#else
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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zynq_ddrc_init();
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return 0;
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}
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#endif
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