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https://github.com/brain-hackers/u-boot-brain
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![Marek Vasut](/assets/img/avatar_default.png)
Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle the bridges on/off as needed according to the handoff file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
92 lines
1.0 KiB
Plaintext
92 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/ {
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chosen {
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u-boot,dm-pre-reloc;
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};
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clocks {
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u-boot,dm-pre-reloc;
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altera_arria10_hps_eosc1 {
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u-boot,dm-pre-reloc;
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};
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altera_arria10_hps_cb_intosc_ls {
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u-boot,dm-pre-reloc;
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};
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altera_arria10_hps_f2h_free {
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u-boot,dm-pre-reloc;
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};
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};
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clock_manager@0xffd04000 {
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u-boot,dm-pre-reloc;
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mainpll {
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u-boot,dm-pre-reloc;
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};
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perpll {
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u-boot,dm-pre-reloc;
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};
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alteragrp {
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u-boot,dm-pre-reloc;
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};
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};
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pinmux@0xffd07000 {
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u-boot,dm-pre-reloc;
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shared {
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u-boot,dm-pre-reloc;
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};
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dedicated {
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u-boot,dm-pre-reloc;
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};
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dedicated_cfg {
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u-boot,dm-pre-reloc;
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};
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fpga {
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u-boot,dm-pre-reloc;
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};
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};
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noc@0xffd10000 {
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u-boot,dm-pre-reloc;
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firewall {
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u-boot,dm-pre-reloc;
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};
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};
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fpgabridge@0 {
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u-boot,dm-pre-reloc;
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};
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fpgabridge@1 {
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u-boot,dm-pre-reloc;
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};
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fpgabridge@2 {
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u-boot,dm-pre-reloc;
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};
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fpgabridge@3 {
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u-boot,dm-pre-reloc;
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};
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fpgabridge@4 {
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u-boot,dm-pre-reloc;
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};
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fpgabridge@5 {
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u-boot,dm-pre-reloc;
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};
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};
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