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CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method to set I/O to 1.8. To boards that does not support vqmmc-supply, use vs18_enable in fsl_esdhc_cfg. If regulator is supported, use fixed 1.8V regulator for vqmmc-supply. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
23 lines
864 B
Plaintext
23 lines
864 B
Plaintext
Freescale esdhc-specific options
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- CONFIG_FSL_ESDHC_ADAPTER_IDENT
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Support Freescale adapter card type identification. This is implemented by
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operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC
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Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot.
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SDHC Card ID[0:2] Adapter Card Type
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0b000 reserved
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0b001 eMMC Card Rev4.5
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0b010 SD/MMC Legacy Card
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0b011 eMMC Card Rev4.4
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0b100 reserved
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0b101 MMC Card
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0b110 SD Card Rev2.0/3.0
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0b111 No card is present
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- CONFIG_SYS_FSL_ESDHC_LE
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ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
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determined by ESDHC IP's endian mode or processor's endian mode.
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- CONFIG_SYS_FSL_ESDHC_BE
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ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined
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by ESDHC IP's endian mode or processor's endian mode.
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