mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 17:08:52 +09:00
![Anatolij Gustschin](/assets/img/avatar_default.png)
Many boards do not use all selected framebuffer depth configurations, for such boards there is some unused code in video and console uclass routines. Make depth specific code optional to avoid dead code and slightly reduce binary size. Also make ANSI code optional for the same reason. When i.e. using only VIDEO_BPP16 the code size shrinks (below values when using gcc-7.3.0): $ ./tools/buildman/buildman -b video-wip -sS wandboard ... 01: Merge git://git.denx.de/u-boot-sh 02: video: add guards around 16bpp/32bbp code 03: video: make BPP and ANSI configs optional arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0 Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Eugen Hristev <eugen.hristev@microchip.com> Tested-by: Patrice Chotard <patrice.chotard@st.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
112 lines
2.8 KiB
Plaintext
112 lines
2.8 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_PX30=y
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CONFIG_TARGET_EVB_PX30=y
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CONFIG_TPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_DEBUG_UART_BASE=0xFF160000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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CONFIG_SPL_TEXT_BASE=0x00000000
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CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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# CONFIG_CONSOLE_MUX is not set
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CONFIG_DEFAULT_FDT_FILE="rockchip/px30-evb.dtb"
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CONFIG_MISC_INIT_R=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_STACK_R=y
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# CONFIG_TPL_BANNER_PRINT is not set
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CONFIG_SPL_CRC32_SUPPORT=y
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CONFIG_SPL_ATF=y
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# CONFIG_TPL_FRAMEWORK is not set
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# CONFIG_CMD_BOOTD is not set
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# CONFIG_CMD_ELF is not set
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_LZMADEC is not set
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# CONFIG_CMD_UNZIP is not set
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CONFIG_CMD_GPT=y
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# CONFIG_CMD_LOADB is not set
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_USB_MASS_STORAGE=y
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_MISC is not set
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_ISO_PARTITION is not set
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CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_FASTBOOT_BUF_ADDR=0x800800
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CONFIG_FASTBOOT_BUF_SIZE=0x04000000
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MISC=y
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CONFIG_ROCKCHIP_OTP=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_TPL_RAM=y
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CONFIG_ROCKCHIP_SDRAM_COMMON=y
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CONFIG_DM_RESET=y
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# CONFIG_SPECIFY_CONSOLE_INDEX is not set
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_SOUND=y
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CONFIG_SYSRESET=y
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CONFIG_OPTEE=y
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CONFIG_DM_THERMAL=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_DM_VIDEO=y
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CONFIG_VIDEO_BPP8=y
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CONFIG_VIDEO_BPP16=y
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CONFIG_VIDEO_BPP32=y
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CONFIG_DISPLAY=y
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CONFIG_LCD=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_TPL_TINY_MEMSET=y
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CONFIG_LZ4=y
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CONFIG_LZO=y
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CONFIG_ERRNO_STR=y
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# CONFIG_EFI_LOADER is not set
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