u-boot-brain/drivers/clk
Simon Glass 0d15463c05 dtoc: Rename the phandle struct
Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-09-15 05:27:47 -06:00
..
aspeed dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
at91 clk: at91: utmi: Set the reference clock frequency 2017-09-14 16:02:29 -04:00
exynos dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
renesas clk: rmobile: Split R8A7795 and R8A7796 core clock tables 2017-08-26 07:04:49 +09:00
rockchip dtoc: Add support for 32 or 64-bit addresses 2017-09-15 05:27:38 -06:00
tegra clock: implement a driver for the Tegra CAR 2016-09-27 09:11:02 -07:00
uniphier clk: uniphier: add System clock support 2017-08-30 09:07:04 +09:00
clk_bcm6345.c dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
clk_boston.c clk: boston: Providea simple driver for Boston board clocks 2016-09-21 15:04:32 +02:00
clk_fixed_rate.c dm: clk: fixed: Update to support livetree 2017-06-01 07:03:14 -06:00
clk_pic32.c dm: core: Replace of_offset with accessor 2017-02-08 06:12:14 -07:00
clk_sandbox_test.c clk: convert API to match reset/mailbox style 2016-06-19 17:05:55 -06:00
clk_sandbox.c clk: sandbox: don't check clk ID against 0 2016-06-24 17:24:35 -04:00
clk_stm32f7.c clk: stm32f7: remove clock_get() 2017-07-26 11:28:08 -04:00
clk_zynq.c dm: clk: Update uclass to support livetree 2017-06-01 07:03:14 -06:00
clk_zynqmp.c clk: zynqmp: Remove unused macros/variables 2017-08-02 09:11:52 +02:00
clk-uclass.c dtoc: Rename the phandle struct 2017-09-15 05:27:47 -06:00
Kconfig clk: Kconfig: Add dependences of SPL_CLK 2017-09-14 13:58:22 -04:00
Makefile spl: dm: Kconfig: split CLK support for SPL and TPL 2017-08-13 17:12:20 +02:00