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![Michal Simek](/assets/img/avatar_default.png)
Remove harcoded XHCI lists and detect mode, speed based on DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Serial-changes: 2 - Remove also XHCI macros from hardware.h - Remove additional new line in zcu106
45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration for Xilinx ZynqMP zcu106
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*
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* (C) Copyright 2016 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*/
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#ifndef __CONFIG_ZYNQMP_ZCU106_H
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#define __CONFIG_ZYNQMP_ZCU106_H
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#define CONFIG_ZYNQ_SDHCI1
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#define CONFIG_SYS_I2C_MAX_HOPS 1
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#define CONFIG_SYS_NUM_I2C_BUSES 18
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#define CONFIG_SYS_I2C_BUSES { \
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{0, {I2C_NULL_HOP} }, \
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{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
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{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
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{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
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{1, {I2C_NULL_HOP} }, \
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{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
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{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
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{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
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{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
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{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
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{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
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}
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#define CONFIG_PCA953X
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_ZYNQ_EEPROM_BUS 5
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#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZCU106_H */
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