mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 19:26:16 +09:00
f605079041
Add support for Freescale T1024/T1023 SoC. The T1024 SoC includes the following function and features: - Two 64-bit Power architecture e5500 cores, up to 1.4GHz - private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC) - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration - Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI) - High-speed peripheral interfaces - Three PCI Express 2.0 controllers - Additional peripheral interfaces - One SATA 2.0 controller - Two USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/eSDHC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Two 8-channel DMA engines - Multicore programmable interrupt controller (PIC) - LCD interface (DIU) with 12 bit dual data rate - QUICC Engine block supporting TDM, HDLC, and UART - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T1024 and T1023: Feature T1024 T1023 QUICC Engine: yes no DIU: yes no Deep Sleep: yes no I2C controller: 4 3 DDR: 64-bit 32-bit IFC: 32-bit 28-bit Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
121 lines
3.5 KiB
Makefile
121 lines
3.5 KiB
Makefile
#
|
|
# (C) Copyright 2006
|
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
#
|
|
# (C) Copyright 2002,2003 Motorola Inc.
|
|
# Xianghua Xiao,X.Xiao@motorola.com
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
MINIMAL=
|
|
|
|
ifdef CONFIG_SPL_BUILD
|
|
ifdef CONFIG_SPL_INIT_MINIMAL
|
|
MINIMAL=y
|
|
endif
|
|
endif
|
|
|
|
extra-y = start.o resetvec.o
|
|
|
|
ifdef MINIMAL
|
|
|
|
obj-y += cpu_init_early.o tlb.o spl_minimal.o
|
|
|
|
else
|
|
|
|
obj-$(CONFIG_MP) += release.o
|
|
|
|
obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o
|
|
obj-$(CONFIG_CPM2) += commproc.o
|
|
|
|
obj-$(CONFIG_CPM2) += ether_fcc.o
|
|
obj-$(CONFIG_OF_LIBFDT) += fdt.o
|
|
obj-$(CONFIG_FSL_CORENET) += liodn.o
|
|
obj-$(CONFIG_MP) += mp.o
|
|
obj-$(CONFIG_PCI) += pci.o
|
|
obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
|
|
|
|
# various SoC specific assignments
|
|
obj-$(CONFIG_PPC_P2041) += p2041_ids.o
|
|
obj-$(CONFIG_PPC_P3041) += p3041_ids.o
|
|
obj-$(CONFIG_PPC_P4080) += p4080_ids.o
|
|
obj-$(CONFIG_PPC_P5020) += p5020_ids.o
|
|
obj-$(CONFIG_PPC_P5040) += p5040_ids.o
|
|
obj-$(CONFIG_PPC_T4240) += t4240_ids.o
|
|
obj-$(CONFIG_PPC_T4160) += t4240_ids.o
|
|
obj-$(CONFIG_PPC_T4080) += t4240_ids.o
|
|
obj-$(CONFIG_PPC_B4420) += b4860_ids.o
|
|
obj-$(CONFIG_PPC_B4860) += b4860_ids.o
|
|
obj-$(CONFIG_PPC_T1040) += t1040_ids.o
|
|
obj-$(CONFIG_PPC_T1042) += t1040_ids.o
|
|
obj-$(CONFIG_PPC_T1020) += t1040_ids.o
|
|
obj-$(CONFIG_PPC_T1022) += t1040_ids.o
|
|
obj-$(CONFIG_PPC_T1023) += t1024_ids.o
|
|
obj-$(CONFIG_PPC_T1024) += t1024_ids.o
|
|
obj-$(CONFIG_PPC_T2080) += t2080_ids.o
|
|
obj-$(CONFIG_PPC_T2081) += t2080_ids.o
|
|
|
|
|
|
obj-$(CONFIG_QE) += qe_io.o
|
|
obj-$(CONFIG_CPM2) += serial_scc.o
|
|
obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
|
|
obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
|
|
|
|
# SoC specific SERDES support
|
|
obj-$(CONFIG_PPC_C29X) += c29x_serdes.o
|
|
obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
|
|
obj-$(CONFIG_MPC8544) += mpc8544_serdes.o
|
|
obj-$(CONFIG_MPC8548) += mpc8548_serdes.o
|
|
obj-$(CONFIG_MPC8568) += mpc8568_serdes.o
|
|
obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
|
|
obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
|
|
obj-$(CONFIG_P1010) += p1010_serdes.o
|
|
obj-$(CONFIG_P1011) += p1021_serdes.o
|
|
obj-$(CONFIG_P1012) += p1021_serdes.o
|
|
obj-$(CONFIG_P1013) += p1022_serdes.o
|
|
obj-$(CONFIG_P1014) += p1010_serdes.o
|
|
obj-$(CONFIG_P1017) += p1023_serdes.o
|
|
obj-$(CONFIG_P1020) += p1021_serdes.o
|
|
obj-$(CONFIG_P1021) += p1021_serdes.o
|
|
obj-$(CONFIG_P1022) += p1022_serdes.o
|
|
obj-$(CONFIG_P1023) += p1023_serdes.o
|
|
obj-$(CONFIG_P1024) += p1021_serdes.o
|
|
obj-$(CONFIG_P1025) += p1021_serdes.o
|
|
obj-$(CONFIG_P2010) += p2020_serdes.o
|
|
obj-$(CONFIG_P2020) += p2020_serdes.o
|
|
obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
|
|
obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
|
|
obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
|
|
obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
|
|
obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
|
|
obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
|
|
obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
|
|
obj-$(CONFIG_PPC_T4080) += t4240_serdes.o
|
|
obj-$(CONFIG_PPC_B4420) += b4860_serdes.o
|
|
obj-$(CONFIG_PPC_B4860) += b4860_serdes.o
|
|
obj-$(CONFIG_BSC9132) += bsc9132_serdes.o
|
|
obj-$(CONFIG_PPC_T1040) += t1040_serdes.o
|
|
obj-$(CONFIG_PPC_T1042) += t1040_serdes.o
|
|
obj-$(CONFIG_PPC_T1020) += t1040_serdes.o
|
|
obj-$(CONFIG_PPC_T1022) += t1040_serdes.o
|
|
obj-$(CONFIG_PPC_T1023) += t1024_serdes.o
|
|
obj-$(CONFIG_PPC_T1024) += t1024_serdes.o
|
|
obj-$(CONFIG_PPC_T2080) += t2080_serdes.o
|
|
obj-$(CONFIG_PPC_T2081) += t2080_serdes.o
|
|
|
|
obj-y += cpu.o
|
|
obj-y += cpu_init.o
|
|
obj-y += cpu_init_early.o
|
|
obj-y += interrupts.o
|
|
ifneq ($(CONFIG_QEMU_E500),y)
|
|
obj-y += speed.o
|
|
endif
|
|
obj-y += tlb.o
|
|
obj-y += traps.o
|
|
|
|
# Stub implementations of cache management functions for USB
|
|
obj-y += cache.o
|
|
|
|
endif # not minimal
|