mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
0cc2a07879
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
101 lines
1.0 KiB
Plaintext
101 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2020 PHYTEC Messtechnik GmbH
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* Author: Teresa Remmet <t.remmet@phytec.de>
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*/
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/ {
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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u-boot,dm-spl;
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};
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};
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&{/soc@0} {
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u-boot,dm-pre-reloc;
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u-boot,dm-spl;
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};
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&clk {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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/delete-property/ assigned-clock-rates;
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};
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&osc_24m {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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&aips1 {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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&aips2 {
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u-boot,dm-spl;
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};
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&aips3 {
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u-boot,dm-spl;
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};
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&iomuxc {
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u-boot,dm-spl;
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};
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&pinctrl_uart3 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc2_gpio {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc2 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc3 {
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u-boot,dm-spl;
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};
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&gpio1 {
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u-boot,dm-spl;
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};
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&gpio2 {
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u-boot,dm-spl;
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};
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&gpio3 {
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u-boot,dm-spl;
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};
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&gpio4 {
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u-boot,dm-spl;
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};
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&gpio5 {
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u-boot,dm-spl;
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};
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&uart3 {
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u-boot,dm-spl;
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};
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&usdhc2 {
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u-boot,dm-spl;
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};
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&usdhc3 {
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u-boot,dm-spl;
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};
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&wdog1 {
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u-boot,dm-spl;
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};
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