Baruch Siach d67b98ed47 ddr: marvell: a38x: allow board specific clock out setup ... DDR clock out might be unrelated to the number of active chip-select. For example, the board might have two DDR components, but only one chip-select. The clk_enable mask allows the board to enable DDR clocks regardless of active chip-selects. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>		2020-01-21 08:31:49 +01:00
..
ddr3_debug.c
ddr3_init.c
ddr3_init.h
ddr3_logging_def.h
ddr3_patterns_64bit.h
ddr3_training_bist.c
ddr3_training_centralization.c
ddr3_training_db.c	mv_ddr: ddr3: fix tRAS timimg parameter	2019-03-19 09:22:05 +01:00
ddr3_training_hw_algo.c	mv_ddr: ddr3: only use active chip-selects when tuning ODT	2019-03-19 09:22:05 +01:00
ddr3_training_hw_algo.h
ddr3_training_ip_bist.h
ddr3_training_ip_centralization.h
ddr3_training_ip_db.h
ddr3_training_ip_def.h
ddr3_training_ip_engine.c	common: Move the image globals into image.h	2020-01-17 14:02:35 -05:00
ddr3_training_ip_engine.h
ddr3_training_ip_flow.h
ddr3_training_ip_pbs.h
ddr3_training_ip_prv_if.h
ddr3_training_ip.h
ddr3_training_leveling.c
ddr3_training_leveling.h
ddr3_training_pbs.c
ddr3_training.c	ddr: marvell: a38x: allow board specific clock out setup	2020-01-21 08:31:49 +01:00
ddr_ml_wrapper.h
ddr_topology_def.h	ddr: marvell: a38x: allow board specific clock out setup	2020-01-21 08:31:49 +01:00
ddr_training_ip_db.h
dram_if.h
Makefile
mv_ddr_build_message.c
mv_ddr_common.c
mv_ddr_common.h
mv_ddr_plat.c
mv_ddr_plat.h
mv_ddr_regs.h
mv_ddr_spd.c
mv_ddr_spd.h
mv_ddr_sys_env_lib.c
mv_ddr_sys_env_lib.h
mv_ddr_topology.c
mv_ddr_topology.h
mv_ddr_training_db.h
seq_exec.h
xor_regs.h
xor.c
xor.h