u-boot-brain/board/freescale/mpc8544ds
Kumar Gala 6bb5b41229 85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks.  This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:42:22 -05:00
..
config.mk Add MPC8544DS basic port board files. 2007-04-23 19:58:28 -05:00
ddr.c fsl-ddr: use the 1T timing as default configuration 2009-01-23 17:03:14 -06:00
law.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
Makefile FSL DDR: Convert MPC8544DS to new DDR code. 2008-08-27 11:43:50 -05:00
mpc8544ds.c 85xx: Report which "bank" of NOR flash we are booting from on FSL boards 2009-07-22 09:42:22 -05:00
tlb.c 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards 2009-01-23 17:03:13 -06:00
u-boot.lds Fix all linker script to handle all rodata sections 2009-03-20 22:39:12 +01:00