mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
09f3ca3dd5
We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
201 lines
5.3 KiB
C
201 lines
5.3 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2009-2011
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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* esd electronic system design gmbh <www.esd.eu>
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*
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* Configuation settings for the esd MEESC board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* SoC must be defined first, before hardware.h is included.
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* In this case SoC is defined in boards.cfg.
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*/
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#include <asm/hardware.h>
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/*
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* Warning: changing CONFIG_SYS_TEXT_BASE requires
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* adapting the initial boot program.
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* Since the linker has to swallow that define, we must use a pure
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* hex number here!
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*/
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#define CONFIG_SYS_TEXT_BASE 0x20002000
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/*
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* since a number of boards are not being listed in linux
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* arch/arm/tools/mach-types any more, the mach-types have to be
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* defined here
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*/
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#define MACH_TYPE_MEESC 2165
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#define MACH_TYPE_ETHERCAN2 2407
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
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/* Misc CPU related */
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SERIAL_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_MISC_INIT_R /* Call misc_init_r */
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#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
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#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
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#define CONFIG_PREBOOT /* enable preboot variable */
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/*
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* Hardware drivers
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*/
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/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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/* general purpose I/O */
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#define CONFIG_AT91_GPIO
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/* Console output */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_USB
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/* LED */
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#define CONFIG_AT91_LED
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/*
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* SDRAM: 1 bank, min 32, max 128 MB
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* Initialized before u-boot gets started.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
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#define CONFIG_SYS_SDRAM_SIZE 0x02000000
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
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/*
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* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
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* leaving the correct space for initial global data structure above
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* that address while providing maximum stack area below.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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/* DataFlash */
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#ifdef CONFIG_SYS_USE_DATAFLASH
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# define CONFIG_ATMEL_DATAFLASH_SPI
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# define CONFIG_HAS_DATAFLASH
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# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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# define AT91_SPI_CLK 15000000
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# define DATAFLASH_TCSS (0x1a << 16)
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# define DATAFLASH_TCHS (0x1 << 24)
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#endif
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/* NOR flash is not populated, disable it */
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#define CONFIG_SYS_NO_FLASH
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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# define CONFIG_NAND_ATMEL
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# define CONFIG_SYS_MAX_NAND_DEVICE 1
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# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
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# define CONFIG_SYS_NAND_DBW_8
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# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
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# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
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#endif
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_FIT
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#define CONFIG_NET_RETRY_COUNT 20
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#undef CONFIG_RESET_PHY_R
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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/* CAN */
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#define CONFIG_AT91_CAN
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/* hw-controller addresses */
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#define CONFIG_ET1100_BASE 0x70000000
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#ifdef CONFIG_SYS_USE_DATAFLASH
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/* bootstrap + u-boot + env in dataflash on CS0 */
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# define CONFIG_ENV_IS_IN_DATAFLASH
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# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
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0x8400)
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# define CONFIG_ENV_OFFSET 0x4200
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# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
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CONFIG_ENV_OFFSET)
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# define CONFIG_ENV_SIZE 0x4200
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#elif CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env + linux in nandflash */
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# define CONFIG_ENV_IS_IN_NAND 1
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# define CONFIG_ENV_OFFSET 0xC0000
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# define CONFIG_ENV_SIZE 0x20000
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#endif
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
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128*1024, 0x1000)
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#endif
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