mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
099b9ae7b7
There is no reason to enable BLK by default for all boards which is just increasing memory footprint for memory contrained boards like cse. zc770s are also saving some space. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
44 lines
1.0 KiB
Plaintext
44 lines
1.0 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ZYNQ=y
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CONFIG_SYS_TEXT_BASE=0x4000000
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CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM013"
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CONFIG_SPL_STACK_R_ADDR=0x200000
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# CONFIG_SPL_FAT_SUPPORT is not set
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CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_FIT_VERBOSE=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="Zynq> "
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_FPGA_LOADBP=y
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CONFIG_CMD_FPGA_LOADFS=y
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CONFIG_CMD_FPGA_LOADMK=y
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CONFIG_CMD_FPGA_LOADP=y
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_BLK=y
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CONFIG_FPGA_XILINX=y
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# CONFIG_MMC is not set
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_SERIAL=y
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CONFIG_ZYNQ_QSPI=y
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