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https://github.com/brain-hackers/u-boot-brain
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095e65839e
There are some differences between the Tegra124 and Tegra210 XUSB padctl code. So far, the common XUSB padctl code only supports Tegra124. Add some parameters etc. so that it can work for both chips. This also allows moving Tegra124's process_nodes() into the common file; something that would have requires edits during the move if done in the previous commit. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
102 lines
2.1 KiB
C
102 lines
2.1 KiB
C
/*
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* Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _TEGRA_XUSB_PADCTL_COMMON_H_
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#define _TEGRA_XUSB_PADCTL_COMMON_H_
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/io.h>
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#include <asm/arch-tegra/xusb-padctl.h>
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struct tegra_xusb_padctl_lane {
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const char *name;
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unsigned int offset;
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unsigned int shift;
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unsigned int mask;
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unsigned int iddq;
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const unsigned int *funcs;
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unsigned int num_funcs;
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};
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struct tegra_xusb_phy_ops {
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int (*prepare)(struct tegra_xusb_phy *phy);
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int (*enable)(struct tegra_xusb_phy *phy);
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int (*disable)(struct tegra_xusb_phy *phy);
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int (*unprepare)(struct tegra_xusb_phy *phy);
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};
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struct tegra_xusb_phy {
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unsigned int type;
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const struct tegra_xusb_phy_ops *ops;
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struct tegra_xusb_padctl *padctl;
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};
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struct tegra_xusb_padctl_pin {
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const struct tegra_xusb_padctl_lane *lane;
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unsigned int func;
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int iddq;
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};
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#define MAX_GROUPS 3
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#define MAX_PINS 6
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struct tegra_xusb_padctl_group {
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const char *name;
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const char *pins[MAX_PINS];
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unsigned int num_pins;
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const char *func;
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int iddq;
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};
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struct tegra_xusb_padctl_soc {
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const struct tegra_xusb_padctl_lane *lanes;
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unsigned int num_lanes;
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const char *const *functions;
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unsigned int num_functions;
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struct tegra_xusb_phy *phys;
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unsigned int num_phys;
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};
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struct tegra_xusb_padctl_config {
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const char *name;
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struct tegra_xusb_padctl_group groups[MAX_GROUPS];
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unsigned int num_groups;
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};
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struct tegra_xusb_padctl {
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const struct tegra_xusb_padctl_soc *socdata;
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struct tegra_xusb_padctl_config config;
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struct fdt_resource regs;
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unsigned int enable;
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};
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extern struct tegra_xusb_padctl padctl;
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static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
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unsigned long offset)
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{
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return readl(padctl->regs.start + offset);
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}
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static inline void padctl_writel(struct tegra_xusb_padctl *padctl,
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u32 value, unsigned long offset)
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{
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writel(value, padctl->regs.start + offset);
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}
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int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,
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const struct tegra_xusb_padctl_soc *socdata);
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#endif
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