mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 13:46:17 +09:00
142dd57c5d
Make memory node available to SPL in prepration to updates to SiFive DDR RAM driver to read memory information from DT. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
54 lines
634 B
Plaintext
54 lines
634 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
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*/
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#include "fu540-c000-u-boot.dtsi"
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#include "fu540-hifive-unleashed-a00-ddr.dtsi"
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/ {
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aliases {
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cpu1 = &cpu1;
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cpu2 = &cpu2;
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cpu3 = &cpu3;
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cpu4 = &cpu4;
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spi0 = &qspi0;
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spi2 = &qspi2;
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};
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config {
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u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */
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};
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memory@80000000 {
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u-boot,dm-spl;
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};
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hfclk {
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u-boot,dm-spl;
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};
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rtcclk {
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u-boot,dm-spl;
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};
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};
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&qspi0 {
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u-boot,dm-spl;
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flash@0 {
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u-boot,dm-spl;
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};
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};
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&qspi2 {
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mmc@0 {
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u-boot,dm-spl;
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};
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};
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&gpio {
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u-boot,dm-spl;
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};
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