Marek Vasut 08eb947004 ddr: altera: sdram: Make sdram_start and sdram_end into u32 ... Originally, both sdram_start and sdram_end were 64b values. The sdram_start had no reason for being so, since our address space is only 32b, so switching sdram_start to u32 is simple. The sdram_end is a bit more complex, since it can actually be set to (1 << 32) if someone really wanted to use an SoCFPGA with 4 GiB of DRAM and fixed the code around a little. But, the code handling the protection rules internally decrements the sdram_end variable anyway. Thus, instead of calling the code and passing in the address of the SDRAM end, pass in the address already decremented by one. This lets the sdram_end be 32b as well. Signed-off-by: Marek Vasut <marex@denx.de>		2015-08-08 14:14:28 +02:00
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altera	ddr: altera: sdram: Make sdram_start and sdram_end into u32	2015-08-08 14:14:28 +02:00
fsl	drivers/ddr/fsl: Adjust bstopre value	2015-08-03 12:06:38 -07:00
marvell	arm: mvebu: a38x: Use correct PEX register access macros	2015-07-23 10:39:25 +02:00