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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
5b56a4c162
The K3 System Controller driver is used for loading and starting the System Firmware, and is used only on R5 SPL. It need not be enabled and built for the A72 U-Boot and SPL, so disable it from the j721e_evm_a72 defconfig. While at this, also remove the unneeded CONFIG_SPL_REMOTEPROC and CONFIG_CMD_REMOTEPROC as no remoteprocs are now loaded from A72 SPL. Signed-off-by: Suman Anna <s-anna@ti.com>
84 lines
2.1 KiB
Plaintext
84 lines
2.1 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_K3=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x8000
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CONFIG_SOC_K3_J721E=y
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CONFIG_TARGET_J721E_A72_EVM=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_SPL_STACK_R_ADDR=0x82000000
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CONFIG_SPL_FS_FAT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_DISTRO_DEFAULTS=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_TEXT_BASE=0x80080000
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_DM_MAILBOX=y
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CONFIG_SPL_DM_RESET=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_SPL_POWER_DOMAIN=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SPL_YMODEM_SUPPORT=y
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CONFIG_CMD_ASKENV=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_ISO_PARTITION is not set
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# CONFIG_EFI_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
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CONFIG_SPL_MULTI_DTB_FIT=y
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CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_TI_SCI=y
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CONFIG_TI_SCI_PROTOCOL=y
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CONFIG_DM_MAILBOX=y
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CONFIG_K3_SEC_PROXY=y
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CONFIG_MISC=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_AM654=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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CONFIG_SPL_PINCTRL=y
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# CONFIG_SPL_PINCTRL_GENERIC is not set
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CONFIG_PINCTRL_SINGLE=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_TI_SCI_POWER_DOMAIN=y
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CONFIG_DM_RESET=y
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CONFIG_RESET_TI_SCI=y
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CONFIG_DM_SERIAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_SYSRESET=y
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CONFIG_SPL_SYSRESET=y
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CONFIG_SYSRESET_TI_SCI=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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