mirror of
https://github.com/brain-hackers/u-boot-brain
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6ae3900a86
This header was renamed to rawnand.h in Linux.
The following is the corresponding commit in Linux.
commit d4092d76a4a4e57b65910899948a83cc8646c5a5
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date: Fri Aug 4 17:29:10 2017 +0200
mtd: nand: Rename nand.h into rawnand.h
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
260 lines
6.2 KiB
C
260 lines
6.2 KiB
C
/*
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* (C) Copyright 2010
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* ISEE 2007 SL, <www.iseebcn.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <status_led.h>
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#include <dm.h>
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#include <ns16550.h>
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#include <twl4030.h>
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#include <netdev.h>
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#include <spl.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/onenand.h>
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#include <jffs2/load_kernel.h>
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#include <mtd_node.h>
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#include <fdt_support.h>
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#include "igep00x0.h"
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static const struct ns16550_platdata igep_serial = {
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.base = OMAP34XX_UART3,
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.reg_shift = 2,
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.clock = V_NS16550_CLK,
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.fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(igep_uart) = {
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"ns16550_serial",
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&igep_serial
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};
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/*
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* Routine: get_board_revision
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* Description: GPIO_28 and GPIO_129 are used to read board and revision from
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* IGEP00x0 boards. First of all, it is necessary to reset USB transceiver from
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* IGEP0030 in order to read GPIO_IGEP00X0_BOARD_DETECTION correctly, because
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* this functionality is shared by USB HOST.
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* Once USB reset is applied, U-boot configures these pins as input pullup to
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* detect board and revision:
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* IGEP0020-RF = 0b00
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* IGEP0020-RC = 0b01
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* IGEP0030-RG = 0b10
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* IGEP0030-RE = 0b11
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*/
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static int get_board_revision(void)
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{
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int revision;
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gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
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"igep0030_usb_transceiver_reset");
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gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
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gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
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gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
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revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
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gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
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gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
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"igep00x0_revision_detection");
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gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
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revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
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gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
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gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
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return revision;
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}
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int onenand_board_init(struct mtd_info *mtd)
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{
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if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
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struct onenand_chip *this = mtd->priv;
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this->base = (void *)CONFIG_SYS_ONENAND_BASE;
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return 0;
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}
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return 1;
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}
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#if defined(CONFIG_CMD_NET)
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static void reset_net_chip(int gpio)
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{
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if (!gpio_request(gpio, "eth nrst")) {
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gpio_direction_output(gpio, 1);
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udelay(1);
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gpio_set_value(gpio, 0);
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udelay(40);
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gpio_set_value(gpio, 1);
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mdelay(10);
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}
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}
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/*
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* Routine: setup_net_chip
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* Description: Setting up the configuration GPMC registers specific to the
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* Ethernet hardware.
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*/
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static void setup_net_chip(void)
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{
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struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
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static const u32 gpmc_lan_config[] = {
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NET_LAN9221_GPMC_CONFIG1,
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NET_LAN9221_GPMC_CONFIG2,
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NET_LAN9221_GPMC_CONFIG3,
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NET_LAN9221_GPMC_CONFIG4,
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NET_LAN9221_GPMC_CONFIG5,
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NET_LAN9221_GPMC_CONFIG6,
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};
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enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
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CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
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/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
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writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
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/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
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/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
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&ctrl_base->gpmc_nadv_ale);
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reset_net_chip(64);
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}
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_SMC911X
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return smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#else
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return 0;
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#endif
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}
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#else
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static inline void setup_net_chip(void) {}
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#endif
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#ifdef CONFIG_OF_BOARD_SETUP
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static int ft_enable_by_compatible(void *blob, char *compat, int enable)
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{
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int off = fdt_node_offset_by_compatible(blob, -1, compat);
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if (off < 0)
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return off;
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if (enable)
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fdt_status_okay(blob, off);
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else
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fdt_status_disabled(blob, off);
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return 0;
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}
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int ft_board_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_FDT_FIXUP_PARTITIONS
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static struct node_info nodes[] = {
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{ "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
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{ "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
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};
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fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
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#endif
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ft_enable_by_compatible(blob, "ti,omap2-nand",
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gpmc_cs0_flash == MTD_DEV_TYPE_NAND);
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ft_enable_by_compatible(blob, "ti,omap2-onenand",
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gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND);
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return 0;
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}
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#endif
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void set_led(void)
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{
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switch (get_board_revision()) {
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case 0:
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case 1:
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gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
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gpio_direction_output(IGEP0020_GPIO_LED, 1);
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break;
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case 2:
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case 3:
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gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
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gpio_direction_output(IGEP0030_GPIO_LED, 0);
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break;
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default:
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/* Should not happen... */
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break;
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}
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}
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void set_boardname(void)
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{
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char rev[5] = { 'F','C','G','E', };
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int i = get_board_revision();
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rev[i+1] = 0;
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env_set("board_rev", rev + i);
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env_set("board_name", i < 2 ? "igep0020" : "igep0030");
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}
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/*
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* Routine: misc_init_r
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* Description: Configure board specific parts
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*/
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int misc_init_r(void)
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{
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t2_t *t2_base = (t2_t *)T2_BASE;
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u32 pbias_lite;
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twl4030_power_init();
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/* set VSIM to 1.8V */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
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TWL4030_PM_RECEIVER_VSIM_VSEL_18,
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TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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/* set up dual-voltage GPIOs to 1.8V */
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pbias_lite = readl(&t2_base->pbias_lite);
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pbias_lite &= ~PBIASLITEVMODE1;
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pbias_lite |= PBIASLITEPWRDNZ1;
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writel(pbias_lite, &t2_base->pbias_lite);
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if (get_cpu_family() == CPU_OMAP36XX)
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writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
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OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
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OMAP34XX_CTRL_WKUP_CTRL);
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setup_net_chip();
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omap_die_id_display();
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set_led();
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set_boardname();
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return 0;
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}
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void board_mtdparts_default(const char **mtdids, const char **mtdparts)
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{
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struct mtd_info *mtd = get_mtd_device(NULL, 0);
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if (mtd) {
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static char ids[24];
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static char parts[48];
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const char *linux_name = "omap2-nand";
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if (strncmp(mtd->name, "onenand0", 8) == 0)
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linux_name = "omap2-onenand";
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snprintf(ids, sizeof(ids), "%s=%s", mtd->name, linux_name);
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snprintf(parts, sizeof(parts), "mtdparts=%s:%dk(SPL),-(UBI)",
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linux_name, 4 * mtd->erasesize >> 10);
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*mtdids = ids;
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*mtdparts = parts;
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}
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}
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