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https://github.com/brain-hackers/u-boot-brain
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In preparation of supporting the new Amlogix AGX SoCs, we need to move the Amlogic GX pinmux functions out of the common code to be able to add a different set of SoC specific pinmux functions for AXG. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
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*/
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#ifndef __PINCTRL_MESON_H__
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#define __PINCTRL_MESON_H__
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#include <linux/types.h>
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struct meson_pmx_group {
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const char *name;
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const unsigned int *pins;
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unsigned int num_pins;
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const void *data;
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};
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struct meson_pmx_func {
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const char *name;
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const char * const *groups;
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unsigned int num_groups;
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};
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struct meson_pinctrl_data {
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const char *name;
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struct meson_pmx_group *groups;
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struct meson_pmx_func *funcs;
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struct meson_bank *banks;
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unsigned int pin_base;
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unsigned int num_pins;
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unsigned int num_groups;
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unsigned int num_funcs;
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unsigned int num_banks;
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const struct driver *gpio_driver;
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void *pmx_data;
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};
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struct meson_pinctrl {
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struct meson_pinctrl_data *data;
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void __iomem *reg_mux;
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void __iomem *reg_gpio;
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};
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/**
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* struct meson_reg_desc - a register descriptor
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*
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* @reg: register offset in the regmap
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* @bit: bit index in register
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*
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* The structure describes the information needed to control pull,
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* pull-enable, direction, etc. for a single pin
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*/
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struct meson_reg_desc {
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unsigned int reg;
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unsigned int bit;
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};
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/**
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* enum meson_reg_type - type of registers encoded in @meson_reg_desc
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*/
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enum meson_reg_type {
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REG_PULLEN,
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REG_PULL,
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REG_DIR,
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REG_OUT,
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REG_IN,
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NUM_REG,
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};
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/**
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* struct meson bank
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*
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* @name: bank name
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* @first: first pin of the bank
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* @last: last pin of the bank
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* @regs: array of register descriptors
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*
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* A bank represents a set of pins controlled by a contiguous set of
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* bits in the domain registers. The structure specifies which bits in
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* the regmap control the different functionalities. Each member of
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* the @regs array refers to the first pin of the bank.
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*/
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struct meson_bank {
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const char *name;
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unsigned int first;
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unsigned int last;
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struct meson_reg_desc regs[NUM_REG];
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};
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#define PIN(x, b) (b + x)
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#define FUNCTION(fn) \
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{ \
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.name = #fn, \
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.groups = fn ## _groups, \
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.num_groups = ARRAY_SIZE(fn ## _groups), \
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}
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#define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
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{ \
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.name = n, \
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.first = f, \
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.last = l, \
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.regs = { \
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[REG_PULLEN] = { per, peb }, \
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[REG_PULL] = { pr, pb }, \
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[REG_DIR] = { dr, db }, \
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[REG_OUT] = { or, ob }, \
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[REG_IN] = { ir, ib }, \
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}, \
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}
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#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
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extern const struct pinctrl_ops meson_pinctrl_ops;
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int meson_pinctrl_get_groups_count(struct udevice *dev);
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const char *meson_pinctrl_get_group_name(struct udevice *dev,
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unsigned int selector);
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int meson_pinmux_get_functions_count(struct udevice *dev);
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const char *meson_pinmux_get_function_name(struct udevice *dev,
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unsigned int selector);
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int meson_pinctrl_probe(struct udevice *dev);
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int meson_gpio_get(struct udevice *dev, unsigned int offset);
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int meson_gpio_set(struct udevice *dev, unsigned int offset, int value);
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int meson_gpio_get_direction(struct udevice *dev, unsigned int offset);
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int meson_gpio_direction_input(struct udevice *dev, unsigned int offset);
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int meson_gpio_direction_output(struct udevice *dev, unsigned int offset,
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int value);
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int meson_gpio_probe(struct udevice *dev);
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#endif /* __PINCTRL_MESON_H__ */
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