mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 21:26:19 +09:00
2ca84bf7b2
The default MSI node in kernel tree is for LS1043A rev1.0 silicon, if rev1.1 silicon used, need to fixup the MSI node to match it. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
399 lines
9.8 KiB
C
399 lines
9.8 KiB
C
/*
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* Copyright 2014-2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <efi_loader.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <phy.h>
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#ifdef CONFIG_FSL_LSCH3
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#include <asm/arch/fdt.h>
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#endif
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#ifdef CONFIG_FSL_ESDHC
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#include <fsl_esdhc.h>
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#endif
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#ifdef CONFIG_SYS_DPAA_FMAN
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#include <fsl_fman.h>
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#endif
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#ifdef CONFIG_MP
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#include <asm/arch/mp.h>
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#endif
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#include <fsl_sec.h>
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#include <asm/arch-fsl-layerscape/soc.h>
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#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
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#include <asm/armv8/sec_firmware.h>
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#endif
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int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
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{
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return fdt_setprop_string(blob, offset, "phy-connection-type",
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phy_string_for_interface(phyc));
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}
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#ifdef CONFIG_MP
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void ft_fixup_cpu(void *blob)
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{
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int off;
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__maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
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fdt32_t *reg;
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int addr_cells;
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u64 val, core_id;
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size_t *boot_code_size = &(__secondary_boot_code_size);
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#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
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defined(CONFIG_FSL_PPA_ARMV8_PSCI)
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int node;
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u32 psci_ver;
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/* Check the psci version to determine if the psci is supported */
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psci_ver = sec_firmware_support_psci_version();
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if (psci_ver == 0xffffffff) {
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/* remove psci DT node */
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node = fdt_path_offset(blob, "/psci");
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if (node >= 0)
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goto remove_psci_node;
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node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
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if (node >= 0)
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goto remove_psci_node;
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node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
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if (node >= 0)
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goto remove_psci_node;
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node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
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if (node >= 0)
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goto remove_psci_node;
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remove_psci_node:
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if (node >= 0)
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fdt_del_node(blob, node);
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} else {
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return;
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}
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#endif
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off = fdt_path_offset(blob, "/cpus");
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if (off < 0) {
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puts("couldn't find /cpus node\n");
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return;
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}
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of_bus_default_count_cells(blob, off, &addr_cells, NULL);
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off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
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while (off != -FDT_ERR_NOTFOUND) {
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reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
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if (reg) {
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core_id = of_read_number(reg, addr_cells);
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if (core_id == 0 || (is_core_online(core_id))) {
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val = spin_tbl_addr;
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val += id_to_core(core_id) *
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SPIN_TABLE_ELEM_SIZE;
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val = cpu_to_fdt64(val);
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fdt_setprop_string(blob, off, "enable-method",
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"spin-table");
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fdt_setprop(blob, off, "cpu-release-addr",
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&val, sizeof(val));
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} else {
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debug("skipping offline core\n");
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}
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} else {
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puts("Warning: found cpu node without reg property\n");
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}
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off = fdt_node_offset_by_prop_value(blob, off, "device_type",
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"cpu", 4);
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}
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fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
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*boot_code_size);
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#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
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efi_add_memory_map((uintptr_t)&secondary_boot_code,
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ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
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EFI_RESERVED_MEMORY_TYPE, false);
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#endif
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}
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#endif
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void fsl_fdt_disable_usb(void *blob)
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{
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int off;
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/*
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* SYSCLK is used as a reference clock for USB. When the USB
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* controller is used, SYSCLK must meet the additional requirement
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* of 100 MHz.
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*/
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if (CONFIG_SYS_CLK_FREQ != 100000000) {
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off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
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while (off != -FDT_ERR_NOTFOUND) {
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fdt_status_disabled(blob, off);
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off = fdt_node_offset_by_compatible(blob, off,
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"snps,dwc3");
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}
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}
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}
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#ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
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static void fdt_fixup_gic(void *blob)
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{
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int offset, err;
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u64 reg[8];
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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unsigned int val;
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struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
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int align_64k = 0;
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val = gur_in32(&gur->svr);
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if (SVR_SOC_VER(val) != SVR_LS1043A) {
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align_64k = 1;
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} else if (SVR_REV(val) != REV1_0) {
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val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
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if (!val)
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align_64k = 1;
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}
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offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
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if (offset < 0) {
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printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
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"interrupt-controller@1400000", fdt_strerror(offset));
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return;
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}
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/* Fixup gic node align with 64K */
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if (align_64k) {
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reg[0] = cpu_to_fdt64(GICD_BASE_64K);
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reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
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reg[2] = cpu_to_fdt64(GICC_BASE_64K);
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reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
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reg[4] = cpu_to_fdt64(GICH_BASE_64K);
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reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
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reg[6] = cpu_to_fdt64(GICV_BASE_64K);
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reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
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} else {
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/* Fixup gic node align with default */
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reg[0] = cpu_to_fdt64(GICD_BASE);
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reg[1] = cpu_to_fdt64(GICD_SIZE);
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reg[2] = cpu_to_fdt64(GICC_BASE);
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reg[3] = cpu_to_fdt64(GICC_SIZE);
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reg[4] = cpu_to_fdt64(GICH_BASE);
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reg[5] = cpu_to_fdt64(GICH_SIZE);
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reg[6] = cpu_to_fdt64(GICV_BASE);
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reg[7] = cpu_to_fdt64(GICV_SIZE);
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}
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err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
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if (err < 0) {
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printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
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"reg", "interrupt-controller@1400000",
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fdt_strerror(err));
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return;
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}
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return;
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}
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#endif
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#ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
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static int _fdt_fixup_msi_node(void *blob, const char *name,
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int irq_0, int irq_1, int rev)
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{
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int err, offset, len;
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u32 tmp[4][3];
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void *p;
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offset = fdt_path_offset(blob, name);
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if (offset < 0) {
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printf("WARNING: fdt_path_offset can't find path %s: %s\n",
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name, fdt_strerror(offset));
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return 0;
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}
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/*fixup the property of interrupts*/
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tmp[0][0] = cpu_to_fdt32(0x0);
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tmp[0][1] = cpu_to_fdt32(irq_0);
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tmp[0][2] = cpu_to_fdt32(0x4);
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if (rev > REV1_0) {
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tmp[1][0] = cpu_to_fdt32(0x0);
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tmp[1][1] = cpu_to_fdt32(irq_1);
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tmp[1][2] = cpu_to_fdt32(0x4);
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tmp[2][0] = cpu_to_fdt32(0x0);
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tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
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tmp[2][2] = cpu_to_fdt32(0x4);
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tmp[3][0] = cpu_to_fdt32(0x0);
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tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
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tmp[3][2] = cpu_to_fdt32(0x4);
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len = sizeof(tmp);
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} else {
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len = sizeof(tmp[0]);
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}
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err = fdt_setprop(blob, offset, "interrupts", tmp, len);
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if (err < 0) {
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printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
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"interrupts", name, fdt_strerror(err));
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return 0;
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}
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/*fixup the property of reg*/
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p = (char *)fdt_getprop(blob, offset, "reg", &len);
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if (!p) {
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printf("WARNING: fdt_getprop can't get %s from node %s\n",
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"reg", name);
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return 0;
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}
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memcpy((char *)tmp, p, len);
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if (rev > REV1_0)
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*((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
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else
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*((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
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err = fdt_setprop(blob, offset, "reg", tmp, len);
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if (err < 0) {
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printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
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"reg", name, fdt_strerror(err));
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return 0;
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}
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/*fixup the property of compatible*/
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if (rev > REV1_0)
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err = fdt_setprop_string(blob, offset, "compatible",
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"fsl,ls1043a-v1.1-msi");
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else
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err = fdt_setprop_string(blob, offset, "compatible",
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"fsl,ls1043a-msi");
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if (err < 0) {
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printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
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"compatible", name, fdt_strerror(err));
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return 0;
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}
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return 1;
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}
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static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
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{
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int offset, len, err;
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void *p;
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int val;
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u32 tmp[4][8];
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offset = fdt_path_offset(blob, name);
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if (offset < 0) {
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printf("WARNING: fdt_path_offset can't find path %s: %s\n",
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name, fdt_strerror(offset));
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return 0;
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}
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p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
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if (!p || len != sizeof(tmp)) {
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printf("WARNING: fdt_getprop can't get %s from node %s\n",
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"interrupt-map", name);
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return 0;
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}
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memcpy((char *)tmp, p, len);
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val = fdt32_to_cpu(tmp[0][6]);
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if (rev > REV1_0) {
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tmp[1][6] = cpu_to_fdt32(val + 1);
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tmp[2][6] = cpu_to_fdt32(val + 2);
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tmp[3][6] = cpu_to_fdt32(val + 3);
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} else {
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tmp[1][6] = cpu_to_fdt32(val);
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tmp[2][6] = cpu_to_fdt32(val);
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tmp[3][6] = cpu_to_fdt32(val);
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}
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err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
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if (err < 0) {
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printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
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"interrupt-map", name, fdt_strerror(err));
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return 0;
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}
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return 1;
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}
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/* Fixup msi node for ls1043a rev1.1*/
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static void fdt_fixup_msi(void *blob)
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{
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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unsigned int rev;
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rev = gur_in32(&gur->svr);
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if (SVR_SOC_VER(rev) != SVR_LS1043A)
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return;
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rev = SVR_REV(rev);
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_fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
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116, 111, rev);
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_fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
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126, 121, rev);
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_fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
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160, 155, rev);
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_fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
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_fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
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_fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
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}
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#endif
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_FSL_LSCH2
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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unsigned int svr = in_be32(&gur->svr);
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/* delete crypto node if not on an E-processor */
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if (!IS_E_PROCESSOR(svr))
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fdt_fixup_crypto_node(blob, 0);
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#if CONFIG_SYS_FSL_SEC_COMPAT >= 4
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else {
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ccsr_sec_t __iomem *sec;
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sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
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fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
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}
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#endif
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#endif
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#ifdef CONFIG_MP
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ft_fixup_cpu(blob);
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#endif
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#ifdef CONFIG_SYS_NS16550
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do_fixup_by_compat_u32(blob, "fsl,ns16550",
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"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
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#endif
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do_fixup_by_compat_u32(blob, "fixed-clock",
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"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
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#ifdef CONFIG_PCI
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ft_pci_setup(blob, bd);
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#endif
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#ifdef CONFIG_FSL_ESDHC
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fdt_fixup_esdhc(blob, bd);
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#endif
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#ifdef CONFIG_SYS_DPAA_FMAN
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fdt_fixup_fman_firmware(blob);
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#endif
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fsl_fdt_disable_usb(blob);
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#ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
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fdt_fixup_gic(blob);
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#endif
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#ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
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fdt_fixup_msi(blob);
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#endif
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}
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