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![]() Currently the cache operation mode is hard-coded to CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs which operate at a different mode. This patch makes the cache operation mode configurable via board config. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> |
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.. | ||
au1x00 | ||
incaip | ||
cache.S | ||
config.mk | ||
cpu.c | ||
interrupts.c | ||
Makefile | ||
start.S | ||
time.c |