mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-11 23:33:26 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
68 lines
2.1 KiB
C
68 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*/
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#ifndef _HIF_H_
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#define _HIF_H_
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/*
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* @file hif.h.
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* hif - PFE hif block control and status register.
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* Mapped on CBUS and accessible from all PE's and ARM.
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*/
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#define HIF_VERSION (HIF_BASE_ADDR + 0x00)
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#define HIF_TX_CTRL (HIF_BASE_ADDR + 0x04)
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#define HIF_TX_CURR_BD_ADDR (HIF_BASE_ADDR + 0x08)
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#define HIF_TX_ALLOC (HIF_BASE_ADDR + 0x0c)
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#define HIF_TX_BDP_ADDR (HIF_BASE_ADDR + 0x10)
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#define HIF_TX_STATUS (HIF_BASE_ADDR + 0x14)
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#define HIF_RX_CTRL (HIF_BASE_ADDR + 0x20)
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#define HIF_RX_BDP_ADDR (HIF_BASE_ADDR + 0x24)
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#define HIF_RX_STATUS (HIF_BASE_ADDR + 0x30)
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#define HIF_INT_SRC (HIF_BASE_ADDR + 0x34)
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#define HIF_INT_ENABLE (HIF_BASE_ADDR + 0x38)
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#define HIF_POLL_CTRL (HIF_BASE_ADDR + 0x3c)
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#define HIF_RX_CURR_BD_ADDR (HIF_BASE_ADDR + 0x40)
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#define HIF_RX_ALLOC (HIF_BASE_ADDR + 0x44)
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#define HIF_TX_DMA_STATUS (HIF_BASE_ADDR + 0x48)
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#define HIF_RX_DMA_STATUS (HIF_BASE_ADDR + 0x4c)
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#define HIF_INT_COAL (HIF_BASE_ADDR + 0x50)
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#define HIF_AXI_CTRL (HIF_BASE_ADDR + 0x54)
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/* HIF_TX_CTRL bits */
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#define HIF_CTRL_DMA_EN BIT(0)
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#define HIF_CTRL_BDP_POLL_CTRL_EN BIT(1)
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#define HIF_CTRL_BDP_CH_START_WSTB BIT(2)
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/* HIF_RX_STATUS bits */
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#define BDP_CSR_RX_DMA_ACTV BIT(16)
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/* HIF_INT_ENABLE bits */
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#define HIF_INT_EN BIT(0)
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#define HIF_RXBD_INT_EN BIT(1)
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#define HIF_RXPKT_INT_EN BIT(2)
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#define HIF_TXBD_INT_EN BIT(3)
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#define HIF_TXPKT_INT_EN BIT(4)
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/* HIF_POLL_CTRL bits*/
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#define HIF_RX_POLL_CTRL_CYCLE 0x0400
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#define HIF_TX_POLL_CTRL_CYCLE 0x0400
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/* Buffer descriptor control bits */
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#define BD_CTRL_BUFLEN_MASK (0xffff)
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#define BD_BUF_LEN(x) (x & BD_CTRL_BUFLEN_MASK)
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#define BD_CTRL_CBD_INT_EN BIT(16)
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#define BD_CTRL_PKT_INT_EN BIT(17)
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#define BD_CTRL_LIFM BIT(18)
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#define BD_CTRL_LAST_BD BIT(19)
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#define BD_CTRL_DIR BIT(20)
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#define BD_CTRL_PKT_XFER BIT(24)
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#define BD_CTRL_DESC_EN BIT(31)
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#define BD_CTRL_PARSE_DISABLE BIT(25)
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#define BD_CTRL_BRFETCH_DISABLE BIT(26)
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#define BD_CTRL_RTFETCH_DISABLE BIT(27)
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#endif /* _HIF_H_ */
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