mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-03 00:33:45 +09:00
15f09a1a83
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
82 lines
1.7 KiB
C
82 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Amarula Solutions
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <ram.h>
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#include <spl.h>
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#include <version.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/bootrom.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/grf_rk3288.h>
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#include <asm/arch-rockchip/periph.h>
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#include <asm/arch-rockchip/pmu_rk3288.h>
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#include <asm/arch-rockchip/sys_proto.h>
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#include <asm/arch-rockchip/timer.h>
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#define GRF_BASE 0xff770000
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void board_init_f(ulong dummy)
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{
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struct udevice *dev;
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int ret;
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/* Example code showing how to enable the debug UART on RK3288 */
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/* Enable early UART on the RK3288 */
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struct rk3288_grf * const grf = (void *)GRF_BASE;
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rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
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GPIO7C6_MASK << GPIO7C6_SHIFT,
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GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
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GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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debug_uart_init();
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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rockchip_timer_init();
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configure_l2ctlr();
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ret = rockchip_get_clk(&dev);
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if (ret) {
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debug("CLK init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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}
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void board_return_to_bootrom(void)
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{
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back_to_bootrom(BROM_BOOT_NEXTSTAGE);
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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void spl_board_init(void)
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{
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puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
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U_BOOT_TIME ")\n");
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}
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