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06e0da70ca
Add node for qspi1 memory connected on the wlsom Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
89 lines
1.9 KiB
Plaintext
89 lines
1.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
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*
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* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
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*/
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/dts-v1/;
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#include "sama5d27_wlsom1.dtsi"
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/ {
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model = "Microchip SAMA5D27 WLSOM1 EK";
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compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d2", "atmel,sama5";
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chosen {
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stdout-path = &uart0;
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};
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onewire_tm: onewire {
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gpios = <&pioA PIN_PC9 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_onewire_tm_default>;
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status = "okay";
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w1_eeprom: w1_eeprom@0 {
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compatible = "maxim,ds24b33";
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status = "okay";
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};
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};
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ahb {
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sdmmc0: sdio-host@a0000000 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
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status = "okay";
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};
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apb {
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qspi1: spi@f0024000 {
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status = "okay";
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};
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macb0: ethernet@f8008000 {
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status = "okay";
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};
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uart0: serial@f801c000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0_default>;
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status = "okay";
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};
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pioA: gpio@fc038000 {
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pinctrl {
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pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
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pinmux = <PIN_PA1__SDMMC0_CMD>,
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<PIN_PA2__SDMMC0_DAT0>,
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<PIN_PA3__SDMMC0_DAT1>,
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<PIN_PA4__SDMMC0_DAT2>,
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<PIN_PA5__SDMMC0_DAT3>;
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bias-disable;
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};
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pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
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pinmux = <PIN_PA0__SDMMC0_CK>,
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<PIN_PA11__SDMMC0_VDDSEL>,
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<PIN_PA12__SDMMC0_WP>,
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<PIN_PA13__SDMMC0_CD>;
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bias-disable;
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};
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pinctrl_uart0_default: uart0_default {
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pinmux = <PIN_PB26__URXD0>,
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<PIN_PB27__UTXD0>;
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bias-disable;
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};
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pinctrl_onewire_tm_default: onewire_tm_default {
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pinmux = <PIN_PC9__GPIO>;
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bias-pull-up;
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};
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};
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};
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};
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};
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};
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