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![Stephen Warren](/assets/img/avatar_default.png)
The HW-defined procedure for booting Tegra requires that some pins be set up as GPIOs immediately at boot in order to avoid glitches on those pins, when the pinmux is programmed. Add a feature to the GPIO driver which executes a GPIO configuration table. Board files will use this to implement the correct HW initialization procedure. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
267 lines
6.2 KiB
C
267 lines
6.2 KiB
C
/*
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* NVIDIA Tegra20 GPIO handling.
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* (C) Copyright 2010-2012
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* NVIDIA Corporation <www.nvidia.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver.
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* Tom Warren (twarren@nvidia.com)
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/bitops.h>
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#include <asm/arch/tegra.h>
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#include <asm/gpio.h>
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enum {
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TEGRA_CMD_INFO,
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TEGRA_CMD_PORT,
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TEGRA_CMD_OUTPUT,
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TEGRA_CMD_INPUT,
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};
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static struct gpio_names {
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char name[GPIO_NAME_SIZE];
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} gpio_names[MAX_NUM_GPIOS];
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static char *get_name(int i)
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{
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return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
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}
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/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
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static int get_config(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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int type;
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u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
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type = (u >> GPIO_BIT(gpio)) & 1;
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debug("get_config: port = %d, bit = %d is %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
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return type;
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}
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/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
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static void set_config(unsigned gpio, int type)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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debug("set_config: port = %d, bit = %d, %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
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u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
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if (type) /* GPIO */
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u |= 1 << GPIO_BIT(gpio);
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else
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u &= ~(1 << GPIO_BIT(gpio));
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writel(u, &bank->gpio_config[GPIO_PORT(gpio)]);
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}
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/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */
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static int get_direction(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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int dir;
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u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
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dir = (u >> GPIO_BIT(gpio)) & 1;
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debug("get_direction: port = %d, bit = %d, %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
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return dir;
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}
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/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */
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static void set_direction(unsigned gpio, int output)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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debug("set_direction: port = %d, bit = %d, %s\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
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u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
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if (output)
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u |= 1 << GPIO_BIT(gpio);
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else
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u &= ~(1 << GPIO_BIT(gpio));
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writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]);
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}
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/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */
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static void set_level(unsigned gpio, int high)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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u32 u;
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debug("set_level: port = %d, bit %d == %d\n",
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GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
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u = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
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if (high)
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u |= 1 << GPIO_BIT(gpio);
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else
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u &= ~(1 << GPIO_BIT(gpio));
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writel(u, &bank->gpio_out[GPIO_PORT(gpio)]);
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}
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/*
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* Generic_GPIO primitives.
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*/
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int gpio_request(unsigned gpio, const char *label)
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{
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if (gpio >= MAX_NUM_GPIOS)
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return -1;
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if (label != NULL) {
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strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE);
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gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
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}
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/* Configure as a GPIO */
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set_config(gpio, 1);
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return 0;
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}
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int gpio_free(unsigned gpio)
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{
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if (gpio >= MAX_NUM_GPIOS)
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return -1;
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gpio_names[gpio].name[0] = '\0';
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/* Do not configure as input or change pin mux here */
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return 0;
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}
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/* read GPIO OUT value of pin 'gpio' */
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static int gpio_get_output_value(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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int val;
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debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
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val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
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return (val >> GPIO_BIT(gpio)) & 1;
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}
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/* set GPIO pin 'gpio' as an input */
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int gpio_direction_input(unsigned gpio)
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{
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debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
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/* Configure GPIO direction as input. */
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set_direction(gpio, 0);
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return 0;
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}
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/* set GPIO pin 'gpio' as an output, with polarity 'value' */
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int gpio_direction_output(unsigned gpio, int value)
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{
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debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio),
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value ? "HIGH" : "LOW");
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/* Configure GPIO output value. */
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set_level(gpio, value);
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/* Configure GPIO direction as output. */
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set_direction(gpio, 1);
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return 0;
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}
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/* read GPIO IN value of pin 'gpio' */
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int gpio_get_value(unsigned gpio)
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{
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struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
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int val;
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debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
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val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
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return (val >> GPIO_BIT(gpio)) & 1;
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}
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/* write GPIO OUT value to pin 'gpio' */
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int gpio_set_value(unsigned gpio, int value)
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{
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debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
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gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
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/* Configure GPIO output value. */
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set_level(gpio, value);
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return 0;
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}
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void gpio_config_table(const struct tegra_gpio_config *config, int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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switch (config[i].init) {
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case TEGRA_GPIO_INIT_IN:
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gpio_direction_input(config[i].gpio);
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break;
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case TEGRA_GPIO_INIT_OUT0:
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gpio_direction_output(config[i].gpio, 0);
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break;
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case TEGRA_GPIO_INIT_OUT1:
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gpio_direction_output(config[i].gpio, 1);
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break;
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}
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set_config(config[i].gpio, 1);
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}
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}
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/*
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* Display Tegra GPIO information
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*/
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void gpio_info(void)
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{
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unsigned c;
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int type;
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for (c = 0; c < MAX_NUM_GPIOS; c++) {
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type = get_config(c); /* GPIO, not SFPIO */
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if (type) {
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printf("GPIO_%d:\t%s is an %s, ", c,
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get_name(c),
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get_direction(c) ? "OUTPUT" : "INPUT");
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if (get_direction(c))
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printf("value = %d", gpio_get_output_value(c));
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else
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printf("value = %d", gpio_get_value(c));
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printf("\n");
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} else
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continue;
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}
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}
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