mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
71 lines
2.0 KiB
C
71 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013 Siemens Schweiz AG
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* (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#ifndef PMIC_H
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#define PMIC_H
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/*
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* The PMIC on this board is a TPS65910.
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*/
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#define PMIC_SR_I2C_ADDR 0x12
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#define PMIC_CTRL_I2C_ADDR 0x2D
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/* PMIC Register offsets */
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#define PMIC_VDD1_REG 0x21
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#define PMIC_VDD1_OP_REG 0x22
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#define PMIC_VDD2_REG 0x24
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#define PMIC_VDD2_OP_REG 0x25
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#define PMIC_DEVCTRL_REG 0x3f
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/* VDD2 & VDD1 control register (VDD2_REG & VDD1_REG) */
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#define PMIC_VGAIN_SEL_MASK (0x3 << 6)
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#define PMIC_ILMAX_MASK (0x1 << 5)
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#define PMIC_TSTEP_MASK (0x7 << 2)
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#define PMIC_ST_MASK (0x3)
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#define PMIC_REG_VGAIN_SEL_X1 (0x0 << 6)
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#define PMIC_REG_VGAIN_SEL_X1_0 (0x1 << 6)
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#define PMIC_REG_VGAIN_SEL_X3 (0x2 << 6)
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#define PMIC_REG_VGAIN_SEL_X4 (0x3 << 6)
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#define PMIC_REG_ILMAX_1_0_A (0x0 << 5)
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#define PMIC_REG_ILMAX_1_5_A (0x1 << 5)
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#define PMIC_REG_TSTEP_ (0x0 << 2)
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#define PMIC_REG_TSTEP_12_5 (0x1 << 2)
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#define PMIC_REG_TSTEP_9_4 (0x2 << 2)
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#define PMIC_REG_TSTEP_7_5 (0x3 << 2)
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#define PMIC_REG_TSTEP_6_25 (0x4 << 2)
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#define PMIC_REG_TSTEP_4_7 (0x5 << 2)
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#define PMIC_REG_TSTEP_3_12 (0x6 << 2)
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#define PMIC_REG_TSTEP_2_5 (0x7 << 2)
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#define PMIC_REG_ST_OFF (0x0)
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#define PMIC_REG_ST_ON_HI_POW (0x1)
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#define PMIC_REG_ST_OFF_1 (0x2)
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#define PMIC_REG_ST_ON_LOW_POW (0x3)
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/* VDD2 & VDD1 voltage selection register. (VDD2_OP_REG & VDD1_OP_REG) */
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#define PMIC_OP_REG_SEL (0x7F)
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#define PMIC_OP_REG_CMD_MASK (0x1 << 7)
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#define PMIC_OP_REG_CMD_OP (0x0 << 7)
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#define PMIC_OP_REG_CMD_SR (0x1 << 7)
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#define PMIC_OP_REG_SEL_MASK (0x7F)
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#define PMIC_OP_REG_SEL_1_1_3 (0x2E) /* 1.1375 V */
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#define PMIC_OP_REG_SEL_1_2_6 (0x38) /* 1.2625 V */
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/* Device control register . (DEVCTRL_REG) */
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#define PMIC_DEVCTRL_REG_SR_CTL_I2C_MASK (0x1 << 4)
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#define PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C (0x0 << 4)
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#define PMIC_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C (0x1 << 4)
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#endif
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