mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
139 lines
2.8 KiB
C
139 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2009-2013 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <command.h>
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#include <i2c.h>
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#include <netdev.h>
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#include <linux/compiler.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_serdes.h>
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#include <asm/fsl_liodn.h>
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#include <fm_eth.h>
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#include "t208xrdb.h"
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#include "cpld.h"
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#include "../common/vid.h"
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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struct cpu_type *cpu = gd->arch.cpu;
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static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};
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printf("Board: %sRDB, ", cpu->name);
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printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ",
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CPLD_READ(hw_ver), CPLD_READ(sw_ver));
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#ifdef CONFIG_SDCARD
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puts("SD/MMC\n");
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#elif CONFIG_SPIFLASH
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puts("SPI\n");
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#else
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u8 reg;
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reg = CPLD_READ(flash_csr);
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if (reg & CPLD_BOOT_SEL) {
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puts("NAND\n");
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} else {
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reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
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printf("NOR vBank%d\n", reg);
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}
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#endif
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puts("SERDES Reference Clocks:\n");
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printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[2], freq[0]);
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printf("SD2_CLK1=%s, SD2_CLK2=%s\n", freq[0], freq[0]);
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return 0;
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}
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int board_early_init_r(void)
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{
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const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
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int flash_esel = find_tlb_idx((void *)flashbase, 1);
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/*
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* Remap Boot flash + PROMJET region to caching-inhibited
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* so that flash can be erased properly.
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*/
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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if (flash_esel == -1) {
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/* very unlikely unless something is messed up */
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puts("Error: Could not find TLB for FLASH BASE\n");
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flash_esel = 2; /* give our best effort to continue */
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} else {
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/* invalidate existing TLB entry for flash + promjet */
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disable_tlb(flash_esel);
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}
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set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
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0, flash_esel, BOOKE_PAGESZ_256M, 1);
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/*
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* Adjust core voltage according to voltage ID
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* This function changes I2C mux to channel 2.
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*/
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if (adjust_vdd(0))
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printf("Warning: Adjusting core voltage failed.\n");
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return 0;
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}
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unsigned long get_board_sys_clk(void)
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{
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return CONFIG_SYS_CLK_FREQ;
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}
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unsigned long get_board_ddr_clk(void)
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{
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return CONFIG_DDR_CLK_FREQ;
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}
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int misc_init_r(void)
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{
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u8 reg;
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/* Reset CS4315 PHY */
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reg = CPLD_READ(reset_ctl);
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reg |= CPLD_RSTCON_EDC_RST;
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CPLD_WRITE(reset_ctl, reg);
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return 0;
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}
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int ft_board_setup(void *blob, bd_t *bd)
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{
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phys_addr_t base;
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phys_size_t size;
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ft_cpu_setup(blob, bd);
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base = env_get_bootm_low();
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size = env_get_bootm_size();
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fdt_fixup_memory(blob, (u64)base, (u64)size);
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#ifdef CONFIG_PCI
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pci_of_setup(blob, bd);
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#endif
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fdt_fixup_liodn(blob);
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fsl_fdt_fixup_dr_usb(blob, bd);
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#ifdef CONFIG_SYS_DPAA_FMAN
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fdt_fixup_fman_ethernet(blob);
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fdt_fixup_board_enet(blob);
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#endif
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return 0;
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}
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