mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 11:16:15 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
114 lines
2.1 KiB
C
114 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Based on corenet_ds.c
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*/
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#include <common.h>
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#include <command.h>
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#include <netdev.h>
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#include <linux/compiler.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_serdes.h>
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#include <asm/fsl_portals.h>
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#include <asm/fsl_liodn.h>
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#include <fm_eth.h>
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#include <pci.h>
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#include "cyrus.h"
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#include "../common/eeprom.h"
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#define GPIO_OPENDRAIN 0x30000000
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#define GPIO_DIR 0x3c000004
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#define GPIO_INITIAL 0x30000000
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#define GPIO_VGA_SWITCH 0x00001000
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int checkboard(void)
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{
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printf("Board: CYRUS\n");
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return 0;
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}
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int board_early_init_f(void)
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{
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
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/*
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* Only use DDR1_MCK0/3 and DDR2_MCK0/3
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* disable DDR1_MCK1/2/4/5 and DDR2_MCK1/2/4/5 to reduce
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* the noise introduced by these unterminated and unused clock pairs.
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*/
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setbits_be32(&gur->ddrclkdr, 0x001B001B);
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/* Set GPIO reset lines to open-drain, tristate */
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setbits_be32(&pgpio->gpdat, GPIO_INITIAL);
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setbits_be32(&pgpio->gpodr, GPIO_OPENDRAIN);
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/* Set GPIO Direction */
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setbits_be32(&pgpio->gpdir, GPIO_DIR);
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return 0;
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}
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int board_early_init_r(void)
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{
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fsl_lbc_t *lbc = LBC_BASE_ADDR;
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out_be32(&lbc->lbcr, 0);
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/* 1 clock LALE cycle */
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out_be32(&lbc->lcrr, 0x80000000 | CONFIG_SYS_LBC_LCRR);
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set_liodns();
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#ifdef CONFIG_SYS_DPAA_QBMAN
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setup_qbman_portals();
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#endif
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print_lbc_regs();
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return 0;
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}
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int misc_init_r(void)
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{
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return 0;
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}
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int ft_board_setup(void *blob, bd_t *bd)
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{
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phys_addr_t base;
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phys_size_t size;
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ft_cpu_setup(blob, bd);
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base = env_get_bootm_low();
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size = env_get_bootm_size();
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fdt_fixup_memory(blob, (u64)base, (u64)size);
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#ifdef CONFIG_PCI
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pci_of_setup(blob, bd);
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#endif
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fdt_fixup_liodn(blob);
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fsl_fdt_fixup_dr_usb(blob, bd);
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#ifdef CONFIG_SYS_DPAA_FMAN
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fdt_fixup_fman_ethernet(blob);
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#endif
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return 0;
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}
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int mac_read_from_eeprom(void)
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{
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init_eeprom(CONFIG_SYS_EEPROM_BUS_NUM,
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CONFIG_SYS_I2C_EEPROM_ADDR,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN);
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return mac_read_from_eeprom_common();
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}
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