u-boot-brain/arch
Stephen Warren 0678587fb6 ARM: implement some Cortex-A9 errata workarounds
Various errata exist in the Cortex-A9 CPU, and may be worked around by
setting some bits in a CP15 diagnostic register. Add code to implement
the workarounds, enabled by new CONFIG_ options.

This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
and modified to remove the logic to conditionally apply the WAR (since we
know exactly which CPU we're running on given the U-Boot configuration),
and use r0 instead of r10 for consistency with the rest of U-Boot's
cpu_init_cp15().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-13 22:24:11 +01:00
..
arm ARM: implement some Cortex-A9 errata workarounds 2013-03-13 22:24:11 +01:00
avr32 Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
blackfin Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
m68k malloc: make malloc_bin_reloc static 2013-02-19 17:01:26 -05:00
microblaze Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
mips Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
nds32 Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
nios2 Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
openrisc openrisc: Use generic global_data 2013-02-04 09:05:46 -05:00
powerpc Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
sandbox Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
sh Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
sparc malloc: make malloc_bin_reloc static 2013-02-19 17:01:26 -05:00
x86 Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
.gitignore update include/asm/ gitignore after move 2010-05-07 00:17:30 +02:00