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https://github.com/brain-hackers/u-boot-brain
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b09b72d83b
The SPI aliases are completely wrong. First, they point to non-existing /spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use ad-hoc string instead of a handle. Furthermore, they are copied multiple times in each board DTS. So fix it such that we move these into socfpga.dtsi and make them use the usual handles. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
60 lines
971 B
Plaintext
60 lines
971 B
Plaintext
/*
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* Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include "socfpga_cyclone5.dtsi"
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/ {
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model = "EBV SOCrates";
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compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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memory {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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};
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&gmac1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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rtc: rtc@68 {
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compatible = "stm,m41t82";
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reg = <0x68>;
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};
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};
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&mmc {
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status = "okay";
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};
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&qspi {
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status = "okay";
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flash0: n25q00@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q00";
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reg = <0>; /* chip select */
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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page-size = <256>;
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block-size = <16>; /* 2^16, 64KB */
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read-delay = <4>; /* delay value in read data capture register */
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tshsl-ns = <50>;
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tsd2d-ns = <50>;
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tchsh-ns = <4>;
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tslch-ns = <4>;
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};
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};
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