Alim Akhtar 061091098a DMC: Exynos5: Enable update mode for DREX controller ... As per Exynos5800 UM ver 0.00 section 17.13.2.1 CONCONTROL register bit 3 [update_mode], Exynos5800 does not support the PHY initiated update. And it is recommanded to set this field to 1'b1 during initialization. This patch sets this bit. Applying MC-initiated mode makes DDL tracking ON, that helps in compensate MIF voltage variation. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>		2014-11-17 19:03:38 +09:00
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cpu	DMC: Exynos5: Enable update mode for DREX controller	2014-11-17 19:03:38 +09:00
dts	Exynos5800: Add DTS for new board Peach-Pi	2014-11-17 19:03:38 +09:00
imx-common	mx6: video_skip: Fix crash on NULL pointer	2014-11-13 17:56:15 +01:00
include	DMC: Exynos5: Enable update mode for DREX controller	2014-11-17 19:03:38 +09:00
lib	ARM: cache-cp15: Use more accurate types	2014-11-12 07:25:42 +01:00
mvebu-common	arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()	2014-10-23 09:59:21 -04:00
config.mk	kconfig: delete redundant CONFIG_${ARCH} definition	2014-07-30 14:42:02 -04:00
Kconfig	Merge branch 'master' of git://www.denx.de/git/u-boot-imx	2014-11-14 13:53:49 -05:00
Kconfig.debug	arm: debug: add Kconfig entries for lowlevel debug	2014-10-26 22:23:12 +01:00