York Sun 054dfd9b9d powerpc/t4240qds: Update DDR timing table ... Update the timing table to support more rank density, based on the theory that similar density DIMMs have similar clock adjust and write level start timing. Update the timing for 1600 and 1866 MT/s. Tested with Micron MT18JSF1G72AZ-1G9E1 DIMMs, iDIMM M3CN-4GMJ3C0C-M92. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>		2013-05-14 16:00:27 -05:00
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ddr.c	powerpc/t4240qds: Update DDR timing table	2013-05-14 16:00:27 -05:00
eth.c	powerpc/t4qds: Add T4QDS board	2012-10-22 15:52:46 -05:00
law.c	board/T4240qds:Fix TLB and LAW size of NAND flash	2013-01-30 11:25:09 -06:00
Makefile	powerpc/t4qds: Add T4QDS board	2012-10-22 15:52:46 -05:00
pci.c	powerpc/t4qds: Add T4QDS board	2012-10-22 15:52:46 -05:00
t4qds.c	T4/serdes: fix the serdes clock frequency	2013-05-14 16:00:25 -05:00
t4qds.h	powerpc/t4qds: move VSC3316 config data from t4qds.h to t4qds.c	2013-01-30 11:25:08 -06:00
t4240qds_qixis.h	powerpc/t4qds: Add T4QDS board	2012-10-22 15:52:46 -05:00
tlb.c	board/T4240qds:Fix TLB and LAW size of NAND flash	2013-01-30 11:25:09 -06:00