Stefan Roese 28e94bb2f7 ppc4xx/POST: Handle cached SDRAM correctly in Denali (440EPx) ECC POST ... This patch fixes a problem in the Denali (440EPx) SDRAM ECC POST test. When cache is enabled in the SDRAM area, the values written to SDRAM need to be flushed from cache to SDRAM using the dcfb instruction. Without this patch the POST ECC test failed. Now its working again on platforms with cache enabled in SDRAM. Signed-off-by: Stefan Roese <sr@denx.de>		2010-11-28 11:06:47 +01:00
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cache_4xx.S	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00
cache.c	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00
denali_ecc.c	ppc4xx/POST: Handle cached SDRAM correctly in Denali (440EPx) ECC POST	2010-11-28 11:06:47 +01:00
ether.c	ppc4xx: Move ppc4xx headers to powerpc include directory	2010-09-23 09:02:05 +02:00
fpu.c	ppc4xx: Move ppc4xx headers to powerpc include directory	2010-09-23 09:02:05 +02:00
Makefile	Switch from archive libraries to partial linking	2010-11-17 21:02:18 +01:00
ocm.c	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00
spr.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
uart.c	ppc4xx: Use common ns16550 functions in 4xx UART POST driver	2010-10-04 11:20:02 +02:00
watchdog.c	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00