mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 19:26:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
122 lines
2.7 KiB
ArmAsm
122 lines
2.7 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* armboot - Startup Code for ARM1176 CPU-core
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*
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* Copyright (c) 2007 Samsung Electronics
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*
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* Copyright (C) 2008
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* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
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*
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* 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
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* 2007-09-21 - Added MoviNAND and OneNAND boot codes by
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* jsgood (jsgood.yang@samsung.com)
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* Base codes by scsuh (sc.suh)
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include <linux/linkage.h>
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#ifndef CONFIG_SYS_PHY_UBOOT_BASE
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#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
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#endif
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/*
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*************************************************************************
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*
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* Startup Code (reset vector)
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*
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* do important init only if we don't start from memory!
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* setup Memory and board specific bits prior to relocation.
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* relocate armboot to ram
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* setup stack
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*
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*************************************************************************
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*/
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.globl reset
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reset:
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/* Allow the board to save important registers */
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b save_boot_params
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.globl save_boot_params_ret
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save_boot_params_ret:
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/*
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* set the cpu to SVC32 mode
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*/
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mrs r0, cpsr
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bic r0, r0, #0x3f
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orr r0, r0, #0xd3
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msr cpsr, r0
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/*
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*************************************************************************
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*
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* CPU_init_critical registers
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*
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* setup important registers
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* setup memory timing
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*
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*************************************************************************
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*/
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/*
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* we do sys-critical inits only at reboot,
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* not when booting from ram!
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*/
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cpu_init_crit:
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/*
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* When booting from NAND - it has definitely been a reset, so, no need
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* to flush caches and disable the MMU
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*/
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#ifndef CONFIG_SPL_BUILD
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/*
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* flush v4 I/D caches
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*/
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mov r0, #0
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mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
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mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
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/*
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* disable MMU stuff and caches
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*/
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
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bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
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orr r0, r0, #0x00000002 @ set bit 1 (A) Align
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orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
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/* Prepare to disable the MMU */
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adr r2, mmu_disable_phys
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sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
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b mmu_disable
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.align 5
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/* Run in a single cache-line */
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mmu_disable:
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mcr p15, 0, r0, c1, c0, 0
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nop
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nop
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mov pc, r2
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mmu_disable_phys:
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#endif
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/*
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* Go setup Memory and board specific bits prior to relocation.
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*/
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bl lowlevel_init /* go setup pll,mux,memory */
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bl _main
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/*------------------------------------------------------------------------------*/
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.globl c_runtime_cpu_setup
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c_runtime_cpu_setup:
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mov pc, lr
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WEAK(save_boot_params)
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b save_boot_params_ret /* back to my caller */
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ENDPROC(save_boot_params)
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