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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 08:28:51 +09:00
![Mike Frysinger](/assets/img/avatar_default.png)
Previously, booting over the UART required the baud rate to be known ahead of time. Using a bit of tricky simple math, we can calculate the new board rate based on the old divisors. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
255 lines
7.0 KiB
C
255 lines
7.0 KiB
C
/*
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* serial.h - common serial defines for early debug and serial driver.
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* any functions defined here must be always_inline since
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* initcode cannot have function calls.
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*
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* Copyright (c) 2004-2007 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __BFIN_CPU_SERIAL_H__
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#define __BFIN_CPU_SERIAL_H__
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/uart.h>
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#ifndef CONFIG_UART_CONSOLE
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# define CONFIG_UART_CONSOLE 0
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#endif
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#ifdef CONFIG_DEBUG_EARLY_SERIAL
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# define BFIN_DEBUG_EARLY_SERIAL 1
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#else
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# define BFIN_DEBUG_EARLY_SERIAL 0
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#endif
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#define LOB(x) ((x) & 0xFF)
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#define HIB(x) (((x) >> 8) & 0xFF)
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#ifndef UART_LSR
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# if (CONFIG_UART_CONSOLE == 3)
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# define pUART_DLH pUART3_DLH
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# define pUART_DLL pUART3_DLL
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# define pUART_GCTL pUART3_GCTL
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# define pUART_IER pUART3_IER
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# define pUART_IERC pUART3_IER_CLEAR
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# define pUART_LCR pUART3_LCR
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# define pUART_LSR pUART3_LSR
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# define pUART_RBR pUART3_RBR
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# define pUART_THR pUART3_THR
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# define UART_THR UART3_THR
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# define UART_LSR UART3_LSR
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# elif (CONFIG_UART_CONSOLE == 2)
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# define pUART_DLH pUART2_DLH
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# define pUART_DLL pUART2_DLL
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# define pUART_GCTL pUART2_GCTL
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# define pUART_IER pUART2_IER
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# define pUART_IERC pUART2_IER_CLEAR
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# define pUART_LCR pUART2_LCR
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# define pUART_LSR pUART2_LSR
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# define pUART_RBR pUART2_RBR
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# define pUART_THR pUART2_THR
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# define UART_THR UART2_THR
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# define UART_LSR UART2_LSR
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# elif (CONFIG_UART_CONSOLE == 1)
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# define pUART_DLH pUART1_DLH
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# define pUART_DLL pUART1_DLL
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# define pUART_GCTL pUART1_GCTL
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# define pUART_IER pUART1_IER
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# define pUART_IERC pUART1_IER_CLEAR
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# define pUART_LCR pUART1_LCR
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# define pUART_LSR pUART1_LSR
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# define pUART_RBR pUART1_RBR
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# define pUART_THR pUART1_THR
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# define UART_THR UART1_THR
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# define UART_LSR UART1_LSR
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# elif (CONFIG_UART_CONSOLE == 0)
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# define pUART_DLH pUART0_DLH
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# define pUART_DLL pUART0_DLL
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# define pUART_GCTL pUART0_GCTL
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# define pUART_IER pUART0_IER
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# define pUART_IERC pUART0_IER_CLEAR
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# define pUART_LCR pUART0_LCR
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# define pUART_LSR pUART0_LSR
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# define pUART_RBR pUART0_RBR
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# define pUART_THR pUART0_THR
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# define UART_THR UART0_THR
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# define UART_LSR UART0_LSR
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# endif
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#endif
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#ifndef __ASSEMBLY__
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/* We cannot use get_sclk() in initcode as it is defined elsewhere. */
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#ifdef BFIN_IN_INITCODE
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# define get_sclk() (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV)
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#endif
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#ifdef __ADSPBF54x__
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# define ACCESS_LATCH()
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# define ACCESS_PORT_IER()
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# define CLEAR_IER() (*pUART_IERC = 0)
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#else
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# define ACCESS_LATCH() (*pUART_LCR |= DLAB)
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# define ACCESS_PORT_IER() (*pUART_LCR &= ~DLAB)
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# define CLEAR_IER() (*pUART_IER = 0)
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#endif
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__attribute__((always_inline))
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static inline void serial_do_portmux(void)
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{
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#if defined(__ADSPBF51x__)
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# define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
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bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_2 | PORT_x_MUX_##mux_rx##_FUNC_2); \
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bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
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switch (CONFIG_UART_CONSOLE) {
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case 0: DO_MUX(G, 5, 5, 9, 10); break; /* Port G; mux 5; PG9 and PG10 */
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case 1: DO_MUX(F, 2, 3, 14, 15); break; /* Port H; mux 2/3; PH14 and PH15 */
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}
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SSYNC();
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#elif defined(__ADSPBF52x__)
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# define DO_MUX(port, mux, tx, rx) \
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bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_3); \
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bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
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switch (CONFIG_UART_CONSOLE) {
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case 0: DO_MUX(G, 2, 7, 8); break; /* Port G; mux 2; PG2 and PG8 */
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case 1: DO_MUX(F, 5, 14, 15); break; /* Port F; mux 5; PF14 and PF15 */
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}
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SSYNC();
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#elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
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# define DO_MUX(func, tx, rx) \
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bfin_write_PORT_MUX(bfin_read_PORT_MUX() & ~(func)); \
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bfin_write_PORTF_FER(bfin_read_PORTF_FER() | PF##tx | PF##rx);
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switch (CONFIG_UART_CONSOLE) {
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case 0: DO_MUX(PFDE, 0, 1); break;
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case 1: DO_MUX(PFTE, 2, 3); break;
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}
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SSYNC();
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#elif defined(__ADSPBF54x__)
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# define DO_MUX(port, tx, rx) \
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bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##tx##_MASK | PORT_x_MUX_##rx##_MASK)) | PORT_x_MUX_##tx##_FUNC_1 | PORT_x_MUX_##rx##_FUNC_1); \
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bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
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switch (CONFIG_UART_CONSOLE) {
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case 0: DO_MUX(E, 7, 8); break; /* Port E; PE7 and PE8 */
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case 1: DO_MUX(H, 0, 1); break; /* Port H; PH0 and PH1 */
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case 2: DO_MUX(B, 4, 5); break; /* Port B; PB4 and PB5 */
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case 3: DO_MUX(B, 6, 7); break; /* Port B; PB6 and PB7 */
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}
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SSYNC();
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#endif
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}
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__attribute__((always_inline))
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static inline void serial_early_init(void)
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{
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/* handle portmux crap on different Blackfins */
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serial_do_portmux();
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/* Enable UART */
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*pUART_GCTL = UCEN;
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/* Set LCR to Word Lengh 8-bit word select */
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*pUART_LCR = WLS_8;
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SSYNC();
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}
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__attribute__((always_inline))
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static inline void serial_early_put_div(uint16_t divisor)
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{
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/* Set DLAB in LCR to Access DLL and DLH */
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ACCESS_LATCH();
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SSYNC();
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/* Program the divisor to get the baud rate we want */
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*pUART_DLL = LOB(divisor);
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*pUART_DLH = HIB(divisor);
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SSYNC();
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/* Clear DLAB in LCR to Access THR RBR IER */
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ACCESS_PORT_IER();
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SSYNC();
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}
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__attribute__((always_inline))
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static inline uint16_t serial_early_get_div(void)
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{
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/* Set DLAB in LCR to Access DLL and DLH */
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ACCESS_LATCH();
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SSYNC();
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uint8_t dll = *pUART_DLL;
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uint8_t dlh = *pUART_DLH;
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uint16_t divisor = (dlh << 8) | dll;
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/* Clear DLAB in LCR to Access THR RBR IER */
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ACCESS_PORT_IER();
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SSYNC();
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return divisor;
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}
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__attribute__((always_inline))
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static inline void serial_early_set_baud(uint32_t baud)
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{
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/* Translate from baud into divisor in terms of SCLK. The
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* weird multiplication is to make sure we over sample just
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* a little rather than under sample the incoming signals.
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*/
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serial_early_put_div((get_sclk() + (baud * 8)) / (baud * 16) - ANOMALY_05000230);
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}
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#ifndef BFIN_IN_INITCODE
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__attribute__((always_inline))
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static inline void serial_early_puts(const char *s)
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{
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if (BFIN_DEBUG_EARLY_SERIAL) {
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serial_puts("Early: ");
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serial_puts(s);
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}
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}
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#endif
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#else
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.macro serial_early_init
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#ifdef CONFIG_DEBUG_EARLY_SERIAL
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call _serial_initialize;
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#endif
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.endm
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.macro serial_early_set_baud
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#ifdef CONFIG_DEBUG_EARLY_SERIAL
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R0.L = LO(CONFIG_BAUDRATE);
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R0.H = HI(CONFIG_BAUDRATE);
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call _serial_set_baud;
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#endif
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.endm
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/* Since we embed the string right into our .text section, we need
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* to find its address. We do this by getting our PC and adding 2
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* bytes (which is the length of the jump instruction). Then we
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* pass this address to serial_puts().
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*/
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#ifdef CONFIG_DEBUG_EARLY_SERIAL
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# define serial_early_puts(str) \
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call _get_pc; \
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jump 1f; \
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.ascii "Early:"; \
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.ascii __FILE__; \
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.ascii ": "; \
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.ascii str; \
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.asciz "\n"; \
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.align 4; \
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1: \
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R0 += 2; \
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call _serial_puts;
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#else
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# define serial_early_puts(str)
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#endif
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#endif
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#endif
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