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https://github.com/brain-hackers/u-boot-brain
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04868b407b
Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
47 lines
1.3 KiB
C
47 lines
1.3 KiB
C
#ifndef _SPMI_SPMI_H
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#define _SPMI_SPMI_H
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/**
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* struct dm_spmi_ops - SPMI device I/O interface
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*
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* Should be implemented by UCLASS_SPMI device drivers. The standard
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* device operations provides the I/O interface for it's childs.
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*
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* @read: read register 'reg' of slave 'usid' and peripheral 'pid'
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* @write: write register 'reg' of slave 'usid' and peripheral 'pid'
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*
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* Each register is 8-bit, both read and write can return negative values
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* on error.
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*/
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struct dm_spmi_ops {
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int (*read)(struct udevice *dev, int usid, int pid, int reg);
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int (*write)(struct udevice *dev, int usid, int pid, int reg,
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uint8_t value);
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};
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/**
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* spmi_reg_read() - read a register from specific slave/peripheral
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*
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* @dev: SPMI bus to read
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* @usid SlaveID
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* @pid Peripheral ID
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* @reg: Register to read
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* @return value read on success or negative value of errno.
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*/
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int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg);
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/**
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* spmi_reg_write() - write a register of specific slave/peripheral
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*
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* @dev: SPMI bus to write
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* @usid SlaveID
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* @pid Peripheral ID
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* @reg: Register to write
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* @value: Value to write
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* @return 0 on success or negative value of errno.
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*/
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int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
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uint8_t value);
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#endif
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