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![Stefan Roese](/assets/img/avatar_default.png)
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
483 lines
17 KiB
Plaintext
483 lines
17 KiB
Plaintext
Freescale Alaska MPC8220 board
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==============================
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TsiChung Liew(Tsi-Chung.Liew@freescale.com)
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Created 9/21/04
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===========================================
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Changed files:
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==============
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- Makefile added MPC8220 and Alaska8220_config
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- MAKEALL added MPC8220 and Alaska8220
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- README added CONFIG_MPC8220, Alaska8220_config
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- common/cmd_bdinfo.c added board information members for MPC8220
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- common/cmd_bootm.c added clocks for MPC8220 in do_bootm_linux()
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- include/common.h added CONFIG_MPC8220
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- include/asm-ppc/u-boot.h added board information members for MPC8220
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- include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk,
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vco_clk, pev_clk, flb_clk, and bExtUart
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- arch/powerpc/lib/board.c added CONFIG_MPC8220 support
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- net/eth.c added FEC support for MPC8220
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Added files:
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============
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- board/alaska directory for Alaska MPC8220
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- board/alaska/alaska.c Alaska dram and BATs setup
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- board/alaska/extserial.c external serial (debug card serial) support
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- board/alaska/flash.c Socket (AMD) and Onboard (INTEL) flash support
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- board/alaska/serial.c to determine which int/ext serial to use
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- board/alaska/Makefile Makefile
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- board/alaska/config.mk config make
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- board/alaska/u-boot.lds Linker description
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- arch/powerpc/cpu/mpc8220/dma.h multi-channel dma header file
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- arch/powerpc/cpu/mpc8220/dramSetup.h dram setup header file
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- arch/powerpc/cpu/mpc8220/fec.h MPC8220 FEC header file
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- arch/powerpc/cpu/mpc8220/cpu.c cpu specific code
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- arch/powerpc/cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup
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- arch/powerpc/cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup
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- arch/powerpc/cpu/mpc8220/fec.c MPC8220 FEC driver
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- arch/powerpc/cpu/mpc8220/i2c.c MPC8220 I2C driver
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- arch/powerpc/cpu/mpc8220/interrupts.c interrupt support (not enable)
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- arch/powerpc/cpu/mpc8220/loadtask.c load dma
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- arch/powerpc/cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock
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- arch/powerpc/cpu/mpc8220/traps.c exception
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- arch/powerpc/cpu/mpc8220/uart.c MPC8220 UART driver
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- arch/powerpc/cpu/mpc8220/Makefile Makefile
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- arch/powerpc/cpu/mpc8220/config.mk config make
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- arch/powerpc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program
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- arch/powerpc/cpu/mpc8220/io.S io functions
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- arch/powerpc/cpu/mpc8220/start.S start up
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- include/mpc8220.h
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- include/asm-ppc/immap_8220.h
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- include/configs/Alaska8220.h
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1. SWITCH SETTINGS
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==================
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1.1 SW1: 0 - Boot from Socket Flash (AMD) or 1 - Onboard Flash (INTEL)
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SW2: 0 - Select MPC8220 UART or 1 - Debug Card UART
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SW3: unsed
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SW4: 0 - 1284 or 1 - FEC1
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SW5: 0 - PEV or 1 - FEC2
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2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
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===========================================
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2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
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linux kernel, you can customize it based on your system requirements:
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DDR: 0x00000000-0x1fffffff (max 512MB)
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MBAR: 0xf0000000-0xf0027fff (128KB)
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CPLD: 0xf1000000-0xf103ffff (256KB)
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FPGA: 0xf2000000-0xf203ffff (256KB)
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Flash: 0xfe000000-0xffffffff (max 32MB)
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3. DEFINITIONS AND COMPILATION
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==============================
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3.1 Explanation on NEW definitions in include/configs/alaska8220.h
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CONFIG_MPC8220 MPC8220 specific
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CONFIG_ALASKA8220 Alaska board specific
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CONFIG_SYS_MPC8220_CLKIN Define Alaska Input Clock
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CONFIG_PSC_CONSOLE Enable MPC8220 UART
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CONFIG_EXTUART_CONSOLE Enable External 16552 UART
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CONFIG_SYS_AMD_BOOT To determine the u-boot is booted from AMD or Intel
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CONFIG_SYS_MBAR MBAR base address
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CONFIG_SYS_DEFAULT_MBAR Reset MBAR base address
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3.2 Compilation
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export CROSS_COMPILE=cross-compile-prefix
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cd u-boot-1-1-x
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make distclean
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make Alaska8220_config
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make
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4. SCREEN DUMP
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==============
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4.1 Alaska MPC8220 board
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Boot from AMD (NOTE: May not show exactly the same)
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U-Boot 1.1.1 (Sep 22 2004 - 22:14:41)
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CPU: MPC8220 (JTAG ID 1640301d) at 300 MHz
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Bus 120 MHz, CPU 300 MHz, PCI 30 MHz, VCO 480 MHz
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Board: Alaska MPC8220 Evaluation Board
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I2C: 93 kHz, ready
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DRAM: 256 MB
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Reserving 167k for U-Boot at: 0ffd6000
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FLASH: 16.5 MB
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*** Warning - bad CRC, using default environment
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In: serial
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Out: serial
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Err: serial
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Net: FEC ETHERNET
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=> flinfo
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Bank # 1: INTEL 28F128J3A
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Size: 8 MB in 64 Sectors
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Sector Start Addresses:
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FE000000 FE020000 FE040000 FE060000 FE080000
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FE0A0000 FE0C0000 FE0E0000 FE100000 FE120000
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FE140000 FE160000 FE180000 FE1A0000 FE1C0000
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FE1E0000 FE200000 FE220000 FE240000 FE260000
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FE280000 FE2A0000 FE2C0000 FE2E0000 FE300000
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FE320000 FE340000 FE360000 FE380000 FE3A0000
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FE3C0000 FE3E0000 FE400000 FE420000 FE440000
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FE460000 FE480000 FE4A0000 FE4C0000 FE4E0000
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FE500000 FE520000 FE540000 FE560000 FE580000
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FE5A0000 FE5C0000 FE5E0000 FE600000 FE620000
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FE640000 FE660000 FE680000 FE6A0000 FE6C0000
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FE6E0000 FE700000 FE720000 FE740000 FE760000
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FE780000 FE7A0000 FE7C0000 FE7E0000
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Bank # 2: INTEL 28F128J3A
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Size: 8 MB in 64 Sectors
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Sector Start Addresses:
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FE800000 FE820000 FE840000 FE860000 FE880000
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FE8A0000 FE8C0000 FE8E0000 FE900000 FE920000
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FE940000 FE960000 FE980000 FE9A0000 FE9C0000
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FE9E0000 FEA00000 FEA20000 FEA40000 FEA60000
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FEA80000 FEAA0000 FEAC0000 FEAE0000 FEB00000
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FEB20000 FEB40000 FEB60000 FEB80000 FEBA0000
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FEBC0000 FEBE0000 FEC00000 FEC20000 FEC40000
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FEC60000 FEC80000 FECA0000 FECC0000 FECE0000
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FED00000 FED20000 FED40000 FED60000 FED80000
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FEDA0000 FEDC0000 FEDE0000 FEE00000 FEE20000
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FEE40000 FEE60000 FEE80000 FEEA0000 FEEC0000
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FEEE0000 FEF00000 (RO) FEF20000 (RO) FEF40000 FEF60000
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FEF80000 FEFA0000 FEFC0000 FEFE0000 (RO)
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Bank # 3: AMD AMD29F040B
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Size: 0 MB in 7 Sectors
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Sector Start Addresses:
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FFF00000 (RO) FFF10000 (RO) FFF20000 (RO) FFF30000 FFF40000
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FFF50000 FFF60000
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Bank # 4: AMD AMD29F040B
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Size: 0 MB in 1 Sectors
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Sector Start Addresses:
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FFF70000 (RO)
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=> bdinfo
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memstart = 0xF0009800
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memsize = 0x10000000
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flashstart = 0xFFF00000
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flashsize = 0x01080000
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flashoffset = 0x00025000
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sramstart = 0xF0020000
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sramsize = 0x00008000
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bootflags = 0x00000001
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intfreq = 300 MHz
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busfreq = 120 MHz
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inpfreq = 30 MHz
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flbfreq = 30 MHz
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pcifreq = 30 MHz
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vcofreq = 480 MHz
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pevfreq = 81 MHz
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ethaddr = 00:E0:0C:BC:E0:60
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eth1addr = 00:E0:0C:BC:E0:61
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IP addr = 192.162.1.2
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baudrate = 115200 bps
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=> printenv
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bootargs=root=/dev/ram rw
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bootdelay=5
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baudrate=115200
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ethaddr=00:e0:0c:bc:e0:60
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eth1addr=00:e0:0c:bc:e0:61
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ipaddr=192.162.1.2
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serverip=192.162.1.1
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gatewayip=192.162.1.1
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netmask=255.255.255.0
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hostname=Alaska
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stdin=serial
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stdout=serial
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stderr=serial
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ethact=FEC ETHERNET
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Environment size: 268/65532 bytes
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=> setenv ipaddr 192.160.1.2
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=> setenv serverip 192.160.1.1
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=> setenv gatewayip 192.160.1.1
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=> saveenv
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Saving Environment to Flash...
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.
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Un-Protected 1 sectors
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Erasing Flash...
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Erasing sector 0 ... done
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Erased 1 sectors
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Writing to Flash... done
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.
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Protected 1 sectors
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=> tftp 0x10000 linux.elf
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Using FEC ETHERNET device
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TFTP from server 192.160.1.1; our IP address is 192.160.1.2; sending through gateway 192.160.1.1
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Filename 'linux.elf'.
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Load address: 0x10000
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Loading: invalid RARP header
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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#################################################################
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##################################################
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done
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Bytes transferred = 2917494 (2c8476 hex)
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=> bootelf
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Loading .text @ 0x00a00000 (23820 bytes)
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Loading .data @ 0x00a06000 (2752512 bytes)
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Clearing .bss @ 0x00ca6000 (12764 bytes)
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## Starting application at 0x00a00000 ...
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Collect some entropy from RAM........done
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loaded at: 00A00000 00CA91DC
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zimage at: 00A06A93 00AD7756
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initrd at: 00AD8000 00CA5565
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avail ram: 00CAA000 014AA000
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Linux/PPC load: ip=off console=ttyS0,115200
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Uncompressing Linux...done.
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Now booting the kernel
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Total memory in system: 256 MB
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Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb
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Linux version 2.4.21-rc1 (r61688@bluesocks.sps.mot.com) (gcc version 3.3.1) #17 Wed Sep 8 11:49:16 CDT 2004
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Motorola Alaska port (C) 2003 Motorola, Inc.
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CPLD rev 3
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CPLD switches 0x1b
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Set Pin Mux for FEC1
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Set Pin Mux for FEC2
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Alaska Pin Multiplexing:
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Port Configuration Register 0 = 0
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Port Configuration Register 1 = 0
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Port Configuration Register 2 = 0
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Port Configuration Register 3 = 50000000
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Port Configuration Register 3 - PCI = 51400180
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Setup Alaska FPGA PIC:
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Interrupt Enable Register *(u32) = 0
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Interrupt Status Register = 2f0000
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Interrupt Enable Register in_be32 = 0
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Interrupt Status Register = 2f0000
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Interrupt Enable Register in_le32 = 0
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Interrupt Status Register = 2f00
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Interrupt Enable Register readl = 0
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Interrupt Status Register = 2f00
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Interrupt Enable Register = 0
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Interrupt Status Register = 2f0000
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Setup Alaska PCI Controller:
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On node 0 totalpages: 65536
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zone(0): 65536 pages.
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zone(1): 0 pages.
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zone(2): 0 pages.
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Kernel command line: ip=off console=ttyS0,115200
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Using XLB clock (120.00 MHz) to set up decrementer
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Calibrating delay loop... 199.88 BogoMIPS
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Memory: 254792k available (1476k kernel code, 708k data, 228k init, 0k highmem)
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Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
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Inode cache hash table entries: 16384 (order: 5, 131072 bytes)
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Mount cache hash table entries: 512 (order: 0, 4096 bytes)
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Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
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Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
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POSIX conformance testing by UNIFIX
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PCI: Probing PCI hardware
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PCI: (pcibios_init) Global-Hose = 0xc029d000
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Scanning bus 00
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Fixups for bus 00
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Bus scan for 00 returning with max=00
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PCI: (pcibios_init) finished pci_scan_bus(hose->first_busno = 0, hose->ops = c01a1a74, hose = c029d000)
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PCI: (pcibios_init) PCI Bus Count = 0 =?= Next Bus# = 1
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PCI: (pcibios_init@pci_fixup_irqs) finished machine dependent PCI interrupt routing!
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PCI: bridge rsrc 81000000..81ffffff (100), parent c01a7f88
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PCI: bridge rsrc 84000000..87ffffff (200), parent c01a7fa4
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PCI: (pcibios_init) finished allocating and assigning resources!
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initDma!
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Using 90 DMA buffer descriptors
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descUsed f0023600, descriptors f002360c freeSram f0024140
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unmask SDMA tasks: 0xf0008018 = 0x6f000000
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Linux NET4.0 for Linux 2.4
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Based upon Swansea University Computer Society NET3.039
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Initializing RT netlink socket
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Starting kswapd
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Journalled Block Device driver loaded
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JFFS version 1.0, (C) 1999, 2000 Axis Communications AB
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JFFS2 version 2.1. (C) 2001 Red Hat, Inc., designed by Axis Communications AB.
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pty: 256 Unix98 ptys configured
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tracek: Copyright (C) Motorola, 2003.
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Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
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ttyS00 at 0xf1001008 (irq = 73) is a ST16650
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ttyS01 at 0xf1001010 (irq = 74) is a ST16650
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elp-fpanel: Copyright (C) Motorola, 2003.
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fpanel: fpanelWait timeout
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elp-engine: Copyright (C) Motorola, 2003.
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Video disabled due to configuration switch 4
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Alpine 1284 driver: Copyright (C) Motorola, 2003.
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1284 disabled due to configuration switch 5
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Alpine USB driver: Copyright (C) Motorola, 2003.
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OK
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USB: Descriptor download completed OK
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enable_irq(41) unbalanced
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enable_irq(75) unbalanced
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elp-dmaram: Copyright (C) Motorola, 2003.
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Total memory in system: 256 MB
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elp_dmaram: offset is 0x10000000, size is 0
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Xicor NVRAM driver: Copyright (C) Motorola, 2003.
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elp-video: Copyright (C) Motorola, 2003.
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Video disabled due to configuration switch 4
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elp-pfm: Copyright (C) Motorola, 2003.
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paddle: Copyright (C) Motorola, 2001, present.
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RAMDISK driver initialized: 16 RAM disks of 12288K size 1024 blocksize
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loop: loaded (max 8 devices)
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PPP generic driver version 2.4.2
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PPP Deflate Compression module registered
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Uniform Multi-Platform E-IDE driver Revision: 7.00beta-2.4
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ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
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init_alaska_mtd: chip probing count 0
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cfi_cmdset_0001: Erase suspend on write enabled
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Using buffer write method
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init_alaska_mtd: bank1, name:ALASKA0, size:16777216bytes
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ALASKA flash0: Using Static image partition definition
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Creating 3 MTD partitions on "ALASKA0":
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0x00000000-0x00280000 : "kernel"
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0x00280000-0x00fe0000 : "user"
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0x00fe0000-0x01000000 : "signature"
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mgt_fec_module_init
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mgt_fec_init()
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mgt_fec_init
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mgt_init_fec_dev(0xc05f6000,0)
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dev c05f6000 fec_priv c05f6160 fec f0009000
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mgt_init_fec_dev(0xc05f6800,1)
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dev c05f6800 fec_priv c05f6960 fec f0009800
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NET4: Linux TCP/IP 1.0 for NET4.0
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IP Protocols: ICMP, UDP, TCP, IGMP
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IP: routing cache hash table of 2048 buckets, 16Kbytes
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TCP: Hash tables configured (established 16384 bind 32768)
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NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
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RAMDISK: Compressed image found at block 0
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Freeing initrd memory: 1845k freed
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JFFS: Trying to mount a non-mtd device.
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VFS: Mounted root (romfs filesystem) readonly.
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Freeing unused kernel memory: 228k init
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INIT: version 2.78 booting
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INIT: Entering runlevel: 1
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"Space, a great big place of unknown stuff." -Dexter, for our MotD.
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[01/Jan/1970:00:00:01 +0000] boa: server version Boa/0.94.8.3
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[01/Jan/1970:00:00:01 +0000] boa: server built Sep 7 2004 at 17:40:55.
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[01/Jan/1970:00:00:01 +0000] boa: starting server pid=28, port 80
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Mounting flash filesystem, will take a minute...
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/etc/rc: line 30: /dev/lp0: No such devish-2.05b#
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sh-2.05b# ifup eth0
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client (v0.9.9-pre) started
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adapter index 2
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adapter hardware address 00:e0:0c:bc:e0:60
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execle'ing /usr/share/udhcpc/default.script
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/sbin/ifconfig eth0
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eth0 Link encap:Ethernet HWaddr 00:E0:0C:BC:E0:60
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BROADCAST MULTICAST MTU:1500 Metric:1
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mgt_fec_open
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Rfec request irq
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X fec_open: rcv_ring_size 8, xmt_ring_size 8
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packmgt_fec_open(): call netif_start_queue()
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ets:0 errors:0 dropped:0 overruns:0 frame:0
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TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
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collisions:0 txqueuelen:100
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RX bytes:0 (0.0 b) TX bytes:0 (0.0 b)
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Base address:0x9000
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/sbin/ifconfig eth0 up
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entering raw listen mode
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Opening raw socket on ifindex 2
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adding option 0x35
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adding option 0x3d
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adding option 0x3c
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Sending discover...
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Waiting on select...
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unrelated/bogus packet
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Waiting on select...
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oooooh!!! got some!
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adding option 0x35
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adding option 0x3d
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adding option 0x3c
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adding option 0x32
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adding option 0x36
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Sending select for 163.12.48.146...
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Waiting on select...
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oooooh!!! got some!
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Waiting on select...
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oooooh!!! got some!
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Lease of 163.12.48.146 obtained, lease time 345600
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execle'ing /usr/share/udhcpc/default.script
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/sbin/ifconfig eth0 163.12.48.146 netmask 255.255.254.0
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/sbin/ifconfig eth0 up
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deleting routers
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/sbin/route del default
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/sbin/route add default gw 163.12.49.254 dev eth0
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adding dns 163.12.252.230
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adding dns 192.55.22.4
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adding dns 192.5.249.4
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entering none listen mode
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sh-2.05b#
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5. REPROGRAM U-BOOT
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===================
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5.1 Reprogram u-boot (boot from AMD)
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1. Unprotect the boot sector
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=> protect off bank 3
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2. Download new u-boot binary file
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=> tftp 0x10000 u-boot.bin
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3. Erase bootsector (max 7 sectors)
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=> erase 0xfff00000 0xfff6ffff
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4. Program the u-boot to flash
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=> cp.b 0x10000 0xfff00000
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5. Reset for the new u-boot to take place
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=> reset
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5.2 Reprogram u-boot (boot from AMD program at INTEL)
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1. Unprotect the boot sector
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=> protect off bank 2
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2. Download new u-boot binary file
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=> tftp 0x10000 u-boot.bin
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3. Erase bootsector (max 7 sectors)
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=> erase 0xfef00000 0xfefdffff
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4. Program the u-boot to flash
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=> cp.b 0x10000 0xfef00000
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5. Reset for the new u-boot to take place
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=> reset
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5.3 Reprogram u-boot (boot from INTEL)
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1. Unprotect the boot sector
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=> protect off bank 4
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2. Download new u-boot binary file
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=> tftp 0x10000 u-boot.bin
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3. Erase bootsector (max 7 sectors)
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=> erase 0xfff00000 0xfffdffff
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4. Program the u-boot to flash
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=> cp.b 0x10000 0xfff00000
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5. Reset for the new u-boot to take place
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=> reset
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5.4 Reprogram u-boot (boot from INTEL program at AMD)
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1. Unprotect the boot sector
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=> protect off bank 1
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2. Download new u-boot binary file
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=> tftp 0x10000 u-boot.bin
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3. Erase bootsector (max 7 sectors)
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=> erase 0xfe080000 0xfe0effff
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4. Program the u-boot to flash
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=> cp.b 0x10000 0xfe080000
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5. Reset for the new u-boot to take place
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=> reset
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